Testing and inspection

Learn the basics of semiconductor testing — wafer test, burn-in and scan test (DFT) — through multiple-choice questions.

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Testing and inspection: key points

Semiconductor products go through several stages of testing during and after manufacturing. Wafer testing before dicing finds defective chips, and final testing after packaging guarantees the characteristics of shipped products.

Burn-in, which removes early failures, and design for testability (DFT), which builds test features into circuits, keep quality high while holding down test costs.

All Testing and inspection questions (50)

  1. Which correctly describes wafer test (probe test)?
  2. Which correctly describes the purpose of burn-in?
  3. Which correctly describes scan design, a form of design for testability (DFT)?
  4. Which items are mainly checked in a semiconductor DC test?
  5. Which correctly describes BIST (built-in self-test)?
  6. Which correctly describes a probe card?
  7. Which correctly describes the stuck-at fault model used in testing logic circuits?
  8. Which is the correct definition of fault coverage for test patterns?
  9. What is KGD (Known Good Die), which is important when mounting several chips in one package?
  10. What is the technique called in which a tester measures several chips simultaneously to lower test cost?
  11. What is it called to automatically generate test patterns that detect faults from a circuit's netlist?
  12. What is the test called that measures the supply current of a CMOS circuit in a quiescent state to detect defects such as bridging faults?
  13. What is the main use of boundary scan, specified in IEEE 1149.1 (JTAG)?
  14. In final test after packaging, which machine works with the tester to feed ICs automatically and sort them according to test results?
  15. What is the two-dimensional chart called that summarizes pass/fail results while varying conditions such as supply voltage and operating frequency?
  16. Which correctly describes the typical test flow of semiconductor products?
  17. Which items are mainly checked in an AC test?
  18. What is the technology called that expands test patterns inside the chip and compresses the responses to reduce scan test data volume and test time?
  19. What is the test called that runs at the actual operating frequency to detect defects where signals propagate too slowly?
  20. What is it called to classify products by performance, such as operating speed and power consumption, based on test results?
  21. In testing, what is it called to set pass/fail limits slightly tighter than the product specification to allow for measurement error and drift over time?
  22. In developing test programs, which is emphasized to lower test cost?
  23. Which method is now common for passing information on chips judged defective in wafer test to the later assembly process?
  24. For automotive semiconductors, what is the main reason for testing not only at room temperature but also at high and low temperatures?
  25. In memory testing, which test pattern repeats writing and reading 0s and 1s while stepping through addresses in order, detecting defects such as interference between adjacent cells?
  26. Which correctly describes ATE (automatic test equipment)?
  27. In wafer test, what is it called to push the probe needles slightly further after they touch the bond pads to ensure contact?
  28. Which pair correctly names the two properties that design for testability aims to improve?
  29. What is the test called that judges chips by running an OS and applications in an environment close to actual use?
  30. Which quality metric expresses the number of defects per million shipped products?
  31. What is the main purpose of testing in semiconductor manufacturing?
  32. In wafer testing, where on the chip do the probe card needles make contact?
  33. What is the basic method for judging whether a chip is good in logic circuit testing?
  34. In testing, what is the set of sequences of 0 and 1 signals applied to a chip's inputs, together with the expected responses, called?
  35. What are the dedicated patterns called, placed between chips on the wafer (in scribe lines) and elsewhere, used to measure characteristics of transistors, resistors and the like to evaluate the process?
  36. What is the inspection called that measures TEG parameters such as threshold voltage and sheet resistance on wafers that have completed front-end processing, to confirm the process met specifications?
  37. In test fixtures connecting the tester and IC, which component uses thin spring-loaded pins to make reliable contact with terminals?
  38. What is the printed circuit board called that attaches to the tester's test head, carries the IC socket and peripheral components and routes signals to the IC for each product?
  39. What is the main advantage of vertical probe cards, which stand the needles perpendicular to the pads?
  40. As wafer testing continues, aluminum debris from the pads and the like accumulates on the probe tips. What is done periodically in response?
  41. What is the purpose of enabling a prober's wafer stage (chuck) to be controlled to high or low temperature?
  42. In logic testing, which pair correctly names the test that exhaustively detects structural faults (such as stuck-at faults) using scan and similar, and the test that checks function as in actual operation?
  43. What is it called when good chips are judged defective and discarded because test limits are too strict or measurements are unstable?
  44. In memory testing, what is the main purpose of making a map recording which bits at which addresses failed?
  45. When compressing scan test outputs, why must signals whose value (0 or 1) is undetermined in simulation (unknowns, X) be removed?
  46. In testing high-speed serial interfaces, which method loops the chip's transmitter output back to its receiver so the chip itself verifies communication?
  47. What is the technique called that dynamically changes test items or limits per chip or per lot based on intermediate results and statistics, such as from wafer test?
  48. In AD converter testing, what is the main purpose of inputting a slowly varying sine wave or similar and counting how often each output code appears (a histogram)?
  49. For a chip that failed scan testing, what is the process called that logically narrows down candidate fault locations from which outputs mismatched on which patterns?
  50. Which technique models defects such as transistor shorts and opens inside standard cells based on each cell's circuit and generates test patterns for them?

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