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Wafer Test vs Final Test: Key Differences Explained

Wafer test is performed on the wafer after front-end processing and before dicing: the needles of a probe card are placed on each chip's bond pads to check whether it is good or bad. Removing defective chips before assembly avoids wasting packaging and assembly costs. Final test measures packaged ICs that a handler places in sockets; it confirms that they operate to specification, including catching defects introduced during assembly, before they are shipped.

AspectWafer test (probe test)Final test
TimingAfter front-end processing, before dicingAfter assembly (encapsulation in a package), before shipment
TargetAll chips on the waferPackaged ICs (chips that passed wafer test, after assembly)
Contact methodA prober moves the wafer and the probe card needles are placed on the chip's bond padsA handler places the IC in a socket, and pogo pins or similar contact the package terminals (leads or balls)
EquipmentTester, prober, probe cardTester, handler, load board with sockets
TemperatureMeasured by changing the temperature of the chuck that holds the wafer. Besides room temperature, it is sometimes measured hot or coldThe handler heats or cools the ICs, which are often measured hot and cold within the product's guaranteed temperature range
Main test itemsDC parameters (such as leakage current), functional test, scan test. For memory, measurements for repair that replaces failing bits with sparesFunction, DC parameters, AC parameters such as timing, operation at actual speed. Grading by speed and other criteria
High-speed signal measurementThe electrical characteristics of the needles impose limits, and high-speed signals or high-current measurements can be difficultSockets are electrically more favorable, making high-speed signals easier to measure
Purpose of finding defectsRemove defective chips before assembly to save packaging and assembly costs. Find process problems early from the wafer mapRemove defects, including those introduced in assembly (such as connection defects), to guarantee quality before shipment
Handling of defectsDefective chips are recorded in electronic wafer map data and are not used in assembly (formerly they were marked with ink)Defective parts are removed, and good parts are sorted by performance and other criteria before shipment
Relation to KGDWhen several chips are mounted in one package, chips confirmed good at this stage (KGD) are requiredEven if a defect is found after assembly, it is difficult to replace only the defective chip

Figures are typical orders of magnitude and vary by process generation and product.

When to use which

Wafer test
When you want to remove defective chips before assembly to save packaging and assembly costs. For products with several chips in one package, when you want to use only chips confirmed good (KGD).
Final test
When you guarantee after assembly that the packaged part works to specification before shipping it. When you want to verify operation over the guaranteed temperature range and at actual speed.
Combined
Typical products undergo both tests in the order wafer test → assembly → final test → shipment. The two tests divide the test items between them, reducing overlap to lower test cost.

FAQ

Why perform wafer test when there is a final test?

Because assembling defective chips wastes package materials and assembly costs. Removing defects at the wafer stage means only good chips are assembled. Also, the distribution of defects on the wafer map helps find the responsible process step early.

How does wafer test differ from WAT (parametric test)?

WAT measures parameters such as threshold voltage and sheet resistance on TEGs (evaluation test patterns) on the wafer to confirm that the process was completed to specification. Wafer test checks whether each product chip operates correctly to judge whether it is good or bad.

What is KGD?

A chip confirmed to be good before mounting (Known Good Die). When several chips are mounted in one package, a single defective chip makes the whole package defective, so the chips must be verified thoroughly at the wafer test stage.

At what stage is burn-in performed?

Burn-in is a test that applies high temperature and voltage to weed out chips prone to early failure, and it is often performed after packaging. Where KGD is required, wafer-level burn-in, performed on the wafer, is also used.

Check your understanding

Which correctly describes wafer test (probe test)?

  1. ABefore dicing, probes contact each chip on the wafer to test its electrical characteristics
  2. BAfter package encapsulation, only the appearance is inspected
  3. CProducts are used for a long period to determine their failure rate
Show answer and explanation

Answer: A. Before dicing, probes contact each chip on the wafer to test its electrical characteristics

In wafer test, a prober moves the wafer so that probe-card needles touch each chip's pads, and a tester checks electrical characteristics and function. Catching bad chips at this stage avoids wasting package materials and assembly effort, since defects cost more the later they are found. Testing after encapsulation is final test, and running products long-term to measure failure rates is reliability testing.

Which correctly describes the typical test flow of semiconductor products?

  1. AFinal test → wafer test → assembly → shipment
  2. BAssembly → wafer test → shipment → final test
  3. CWafer test → assembly → final test → shipment
Show answer and explanation

Answer: C. Wafer test → assembly → final test → shipment

Wafer test is performed first on the finished wafer to identify bad chips. Only good chips are packaged in assembly, and final test verifies their characteristics before shipment. Some products add burn-in or system-level test around final test. Final test must follow assembly and no testing occurs after shipment, so the other orders do not work.

Which correctly describes a probe card?

  1. AA mold for encapsulating chips
  2. BA container for transporting wafers
  3. CA fixture that contacts needles to the chip electrodes on a wafer and connects them electrically to the tester
Show answer and explanation

Answer: C. A fixture that contacts needles to the chip electrodes on a wafer and connects them electrically to the tester

A probe card is a product-specific fixture with many needles arranged to match the chip's pad layout. The prober aligns the wafer by camera and raises the chuck to bring pads into contact with the needles, electrically connecting tester and chip. Needle types include angled cantilever, vertical and MEMS-fabricated probes. It is unrelated to molds for encapsulation or wafer carriers.

  1. In final test after packaging, which machine works with the tester to feed ICs automatically and sort them according to test results?
  2. What is KGD (Known Good Die), which is important when mounting several chips in one package?
  3. Which method is now common for passing information on chips judged defective in wafer test to the later assembly process?

Practice Testing and inspection questions

Key terms explained

Wafer test (probe test)
Checking the electrical characteristics of each chip on the wafer by touching probes to its pads before dicing. It finds bad chips before assembly so they are not packaged needlessly.
Probe card
A fixture that presses many needles (probes) onto chip electrodes on the wafer to connect them electrically to a tester.
KGD (known good die)
A chip confirmed to be good before packaging. It matters when several chips go into one package, because a single bad chip ruins the whole module.
Burn-in
A test that operates products under stress such as high temperature and high voltage to remove units prone to early failure before shipment.
Dicing
Cutting a wafer into individual chips (dies). Besides sawing with a rotating blade, there are methods such as stealth dicing, which forms a modified layer inside the wafer with a laser.

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