Testing and inspection

Which correctly describes the stuck-at fault model used in testing logic circuits?

  1. AA fault in which signals propagate more slowly
  2. BA fault in which a signal line's value is fixed at 0 or 1
  3. CA fault in which the chip's temperature rises
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Answer: B. A fault in which a signal line's value is fixed at 0 or 1

The stuck-at fault model assumes faults in which a signal line in the circuit is always 0 (stuck-at-0) or always 1 (stuck-at-1). Though simple, it represents many physical defects, so it is widely used for automatic test pattern generation and evaluating fault coverage. Delay is targeted by delay fault models.

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More Testing and inspection questions

  1. Which is the correct definition of fault coverage for test patterns?
  2. What is KGD (Known Good Die), which is important when mounting several chips in one package?
  3. What is the technique called in which a tester measures several chips simultaneously to lower test cost?
  4. What is it called to automatically generate test patterns that detect faults from a circuit's netlist?
  5. What is the test called that measures the supply current of a CMOS circuit in a quiescent state to detect defects such as bridging faults?