The threshold voltage is the sum of three terms: the flat-band voltage, the potential 2φF needed to strongly invert the surface, and the voltage that supports the depletion charge. Change the oxide thickness or substrate doping and see in numbers how much each term moves.
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Results
Threshold voltage Vth
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Flat-band voltage VFB
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Work-function difference φms
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Fermi potential φF
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Depletion-charge term ±Qd/Cox
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Oxide capacitance Cox
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Maximum depletion width Wdmax
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Body-effect coefficient γ
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Calculated for a long channel with uniform substrate doping at 300 K, an SiO₂ gate dielectric (relative permittivity 3.9) and a silicon substrate (relative permittivity 11.7, electron affinity 4.05 eV, band gap 1.12 eV, ni 1.0×10¹⁰ cm⁻³). The work function of n⁺ poly-Si is taken as the conduction-band edge (4.05 eV) and that of p⁺ poly-Si as the valence-band edge (5.17 eV). Poly-Si gate depletion, quantum effects, short-channel effects and doping profiles from channel implants are not included.
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Other inputs stay at their current values while the chosen input varies from 1/4 to 4 times its current value. The red dot is the current value.
Threshold voltage formula
For an nMOS, the threshold condition is strong inversion: the surface potential bends by 2φF so that the surface electron density equals the hole density in the substrate. Then Vth = VFB + 2φF + √(2qεsNA(2φF + VSB))/Cox, where φF = (kT/q)ln(NA/ni) is the Fermi potential and Cox = εox/tox is the oxide capacitance per unit area. The flat-band voltage VFB = φms − Qf/Cox is set by the work-function difference φms between gate and substrate and the fixed charge Qf in the oxide. For a pMOS the signs reverse: Vth = VFB + 2φF − √(2qεsND(2|φF| + |VSB|))/Cox (with φF < 0).
Assumptions
The channel is long and the substrate doping under the gate is uniform. In real transistors, ions are implanted only near the channel surface (a channel implant) to tune the threshold voltage, so the doping varies with depth. With short gate lengths, the drain field lowers Vth through short-channel effects and DIBL. When the oxide is thinner than a few nm, poly-Si gate depletion and quantum effects in the inversion layer make the effective oxide thickness appear larger. The values from this tool are textbook estimates for seeing in which direction and by how much each parameter shifts Vth.
Worked example
With the defaults (nMOS, n⁺ poly-Si gate, tox = 5 nm, NA = 5×10¹⁷ cm⁻³, Qf/q = 10¹⁰ cm⁻²), Cox ≈ 0.691 µF/cm², φF ≈ 0.458 V, φms ≈ −1.018 V, VFB ≈ −1.021 V and the depletion-charge term ≈ 0.565 V, giving Vth ≈ −1.021 + 0.917 + 0.565 ≈ 0.461 V. Thickening the oxide to 10 nm doubles the depletion term to about 1.129 V and raises Vth to about 1.02 V. A substrate doping of 10¹⁸ cm⁻³ gives Vth ≈ 0.728 V, and a body bias of 1 V gives Vth ≈ 0.713 V. Switching to a p⁺ poly-Si gate increases φms by 1.12 V, giving Vth ≈ 1.58 V. This is why CMOS uses n⁺ poly-Si for nMOS and p⁺ poly-Si for pMOS: it keeps the magnitudes of both threshold voltages small and matched.
Values used and their sources
The relative permittivities of silicon and SiO₂ (11.7 and 3.9), the electron affinity of silicon (4.05 eV), its band gap (1.12 eV) and its intrinsic carrier density (1.0×10¹⁰ cm⁻³) are representative material values used in semiconductor device textbooks. The default fixed charge of 10¹⁰ cm⁻² is the order of magnitude often quoted for a good-quality thermal oxide. The work function of a metal gate depends on the material, the crystal orientation and the underlying films, so enter the value from your own reference.
Higher substrate doping means more acceptor charge in the depletion region before the surface inverts, and a larger Fermi potential φF, so more gate voltage is needed and Vth rises. Channel implants adjust Vth this way. But heavy doping lowers mobility and increases variability from random dopant fluctuation, so FinFETs and GAA devices use nearly undoped channels and set Vth with the gate work function.
A thicker gate dielectric lowers Cox, so more gate voltage is needed to support the same depletion charge and the threshold magnitude increases (the Qd/Cox term in Vth = VFB + 2φF + Qd/Cox grows). Within one chip, thin-oxide transistors serve the core while thick-oxide transistors handle 1.8 V or 3.3 V I/O (dual gate oxide). Thick-oxide devices tolerate higher voltage but are slower and have higher Vth.
Reverse-biasing the source-to-body junction widens the depletion region under the gate and increases its charge, so a larger gate voltage is needed to compensate—the threshold voltage rises (the body effect). In stacked transistors the upper devices see raised source potentials, so their Vth increases and they slow down. Conversely, adjusting body voltage to tune Vth is used to cut leakage.
AThe gate voltage at which the channel reaches strong inversion
BThe gate voltage at which the gate insulator breaks down
CThe gate voltage at which the bands at the semiconductor surface are not bent (are flat)
Show answer and explanation
Answer: C. The gate voltage at which the bands at the semiconductor surface are not bent (are flat)
The flat-band voltage VFB is the gate voltage at which the semiconductor's bands at the surface are flat, given by VFB = φms − Qox/Cox (work-function difference and charge in the dielectric and at the interface). Threshold voltage is VFB plus 2φF and the voltage from depletion charge. Shifts in VFB seen in C-V measurements reveal oxide charge and contamination such as Na ions, making it an important process-control metric.
FAQ
What happens to the threshold voltage when the gate oxide is made thinner?
For an nMOS, the depletion-charge term Qd/Cox shrinks in proportion to tox, so Vth goes down. With the defaults, reducing tox from 5 nm to 2.5 nm changes Vth from about 0.461 V to about 0.179 V. That is why, when the oxide is thinned for scaling, Vth is re-tuned by raising the substrate doping or changing the gate work function.
Why does body bias raise the threshold voltage?
Reverse-biasing the substrate with respect to the source widens the depletion region and increases the depletion charge that the gate must support. The shift is ΔVth = γ(√(2φF + VSB) − √(2φF)); with the defaults (γ ≈ 0.59 V^½), VSB = 1 V raises Vth by about 0.25 V. This is called the body effect (substrate bias effect).
Does this work for high-k/metal gate transistors?
As an estimate, yes. Enter the EOT (equivalent oxide thickness, the SiO₂-equivalent thickness) in the oxide thickness field, set the gate to "Metal" and enter the effective work function. However, charge in the high-k film and interface dipoles shift the threshold voltage, and real scaled transistors use 3D structures such as FinFET and GAA, so the results will differ from this formula.
