Enter the resolution, clock jitter and input frequency to get the SNR set by quantization noise, the SNR set by sampling-clock jitter, their combination and the resulting effective number of bits (ENOB). Enter a datasheet SINAD to see the ENOB it implies.
Results
LSB voltage
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Quantization-limited SNR
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Jitter-limited SNR
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Combined SNR
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Effective number of bits (ENOB)
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ENOB from SINAD
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Ideal values for a full-scale sine-wave input. Quantization noise and jitter noise are added as powers. The oversampling gain is 10·log10(OSR) dB, without noise shaping. Real ADCs lose further SNR to thermal noise, distortion and other effects.
See it as a graph
Other inputs stay at their current values while the chosen input varies from 1/4 to 4 times its current value. The red dot is the current value.
Where 6.02N + 1.76 dB comes from
In an ideal N-bit ADC the quantization error is treated as uniformly spread over ±1/2 LSB, giving an rms noise of LSB/√12. A full-scale sine wave has an amplitude of half the full scale, so its rms value is (2^N × LSB ÷ 2)/√2. Their ratio in dB is SNR = 20·log10(2^N) + 20·log10(√1.5) = 6.02N + 1.76 dB. With the defaults of 12 bits and a 2 V full scale, one LSB (full scale ÷ 2^N) is about 0.488 mV and the SNR is about 74.0 dB. A smaller input lowers the SNR accordingly.
Why jitter limits high-frequency inputs
If the sampling instant wanders by the clock jitter σ, the voltage error grows with the slope of the input signal. For a full-scale sine wave at frequency fin, the jitter-limited SNR is −20·log10(2π × fin × σ). Every tenfold increase in input frequency or jitter costs 20 dB. The defaults of 10 MHz and 1 ps rms give about 84.0 dB; adding its noise power to the 74.0 dB quantization noise gives about 73.6 dB, or an ENOB of about 11.93 bits. At 100 MHz, jitter alone limits SNR to about 64.0 dB, below the 12-bit ideal.
Gaining resolution by oversampling
When quantization noise behaves like white noise unrelated to the input, its power spreads evenly from 0 to half the sampling rate. Sampling faster than the signal band requires and removing out-of-band noise with a digital filter leaves less noise in band. The gain is 10·log10(OSR) dB, so each fourfold increase in the oversampling ratio (OSR) adds about 6 dB, roughly one bit. Without noise shaping, though, gaining 4 bits needs an OSR of 256. Delta-sigma ADCs use noise shaping to push noise out of band and reach high resolution with far lower OSR.
Reading SINAD and ENOB in datasheets
Besides SNR, which counts noise only, datasheets give SINAD (signal-to-noise-and-distortion ratio), which also includes harmonic distortion. The effective number of bits is ENOB = (SINAD − 1.76) ÷ 6.02, the resolution of an ideal ADC with the same performance. A SINAD of 70 dB, for example, corresponds to about 11.34 bits. SINAD and ENOB depend on the input frequency, amplitude and sampling rate used in the test, and usually fall at higher input frequencies because of jitter and distortion. Check the value at your frequency or the plot against frequency.
An ideal ADC's SNR is 6.02N + 1.76 dB, improving about 6 dB per bit: roughly 74 dB at 12 bits and 98 dB at 16 bits. It follows from the ratio of a full-scale sine's rms value to the quantization noise rms, LSB/√12. Real ADCs fall short due to thermal noise, distortion and clock jitter, so actual performance is compared by the effective number of bits (ENOB) calculated from measurements.
Rounding a continuous value to steps 1 LSB wide always introduces error, at most ±1/2 LSB in an ideal ADC. When the input varies enough, the error behaves like noise uniformly distributed over ±1/2 LSB with an rms value of LSB/√12—the basis of the ideal SNR of 6.02N + 1.76 dB. More bits mean a smaller LSB and smaller quantization error.
Total quantization noise is fixed, so raising the sampling rate spreads it thinly over a wider band. In-band noise falls by 10 log₁₀(4) ≈ 6 dB, about one bit. Plain oversampling is therefore inefficient: one extra bit needs 4× the rate, and two bits need 16×. ΔΣ converters add noise shaping to obtain far greater improvement.
The SNR of an ideal N-bit ADC is determined only by quantization noise and is 6.02N + 1.76 dB. Using this in reverse gives ENOB = (SINAD − 1.76)/6.02 = (74 − 1.76)/6.02 ≈ 12.0 bits. It means that, despite its 16-bit output, noise and distortion make its actual performance equivalent to an ideal 12-bit ADC. SINAD varies with input signal frequency and amplitude, so check the value or graph at a frequency close to your operating conditions. Resolution and actual accuracy are different things.
FAQ
What is the ideal SNR of a 12-bit ADC?
6.02 × 12 + 1.76 ≈ 74.0 dB. This is the theoretical limit for a full-scale sine input with quantization noise only; real parts are lower because of thermal noise, distortion and jitter.
What ENOB does a SINAD of 74 dB give?
(74 − 1.76) ÷ 6.02 ≈ 12.0 bits. Even a 16-bit ADC with a SINAD of 74 dB performs like an ideal converter of about 12 bits.
How many bits does a fourfold oversampling ratio add?
With plain oversampling and no noise shaping, in-band quantization noise falls by about 6 dB, about one bit. Two extra bits need an oversampling ratio of 16.