What is FinFET?

A 3D transistor whose channel stands up like a fin and is surrounded by the gate on three sides. It suppresses short-channel effects well.

Cross-sections of a planar transistor and a FinFET Planar Gate Gate controls the top only FinFET Gate Fin Gate wraps the top and both sides

Field: Advanced transistors (FinFET and GAA)

FinFET in the explanations

Questions that mention FinFET (14)

  1. Which correctly describes the structure of a FinFET?
  2. How is the effective channel width of a FinFET adjusted?
  3. What is the main purpose of growing raised crystal on the fins in the source and drain of a FinFET by epitaxial growth?
  4. For a FinFET whose fin is 50 nm tall and 6 nm wide, which is closest to the effective channel width per fin (the perimeter wrapped by the gate)?
  5. To adequately suppress short-channel effects in a FinFET, what is generally required of the fin width?
  6. In a FinFET made in the usual orientation on a (100) wafer, the fin sidewalls that form the channel are mainly (110) planes. What is the effect on mobility?
  7. Which correctly describes a GAA (gate-all-around) transistor?
  8. Compared with FinFETs, what is a design advantage of nanosheet GAA transistors?
  9. Which company and generation first put FinFETs (called Tri-Gate by Intel) into volume-production logic products?
  10. What does "nanosheet" refer to in a nanosheet GAA transistor?
  11. Which method is mainly used for device isolation in scaled LSIs?
  12. Which is a characteristic of radical oxidation, which uses oxygen radicals?
  13. What is an advantage of plasma doping, in which the wafer is exposed directly to a dopant-containing plasma and implanted with low-energy ions?
  14. Which deposition method fills very narrow, deep trenches from the bottom with a flowable film and then solidifies it?

Related terms

GAA (gate-all-around) Nanosheet Mobility STI (shallow trench isolation) CVD Plasma Epitaxial growth SiGe (silicon-germanium) Lattice mismatch CMP

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