SRAM and flash memory

In a 6T SRAM cell, which design is needed so that the cell contents are not flipped during a read (to prevent read upset)?

  1. AMake the access transistor stronger than the pull-down transistor
  2. BRemove the pull-up transistor
  3. CMake the pull-down (driver) transistor stronger than the access transistor
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Answer: C. Make the pull-down (driver) transistor stronger than the access transistor

During a read, current flows into the node holding 0 from the precharged bit line through the access transistor, raising its voltage slightly. If the pull-down transistor is sufficiently stronger than the access transistor (cell ratio β > 1), this rise stays small and the opposite inverter does not flip.

  • A. A too-strong access transistor makes the cell more likely to flip during reads.
  • B. Without pull-up transistors, the cell cannot hold a 1.
  • C. Correct. A stronger pull-down limits the rise at the node holding 0.
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More SRAM and flash memory questions

  1. Which is an example of a "write assist" technique to prevent SRAM write failures at low voltage?
  2. In multi-level (MLC or TLC) NAND flash, why are the bit patterns assigned to adjacent threshold-voltage states chosen to differ by only one bit?
  3. In 3D NAND, what is the structure called in which the edge of the stack is shaped into steps so that each layer's word line can be connected?
  4. In 3D NAND, what is the main advantage of placing peripheral circuits such as sense amplifiers beneath the memory array (CMOS under Array and similar)?
  5. Which correctly describes the structure of a typical six-transistor SRAM cell?