Advanced transistors (FinFET and GAA)

For a FinFET whose fin is 50 nm tall and 6 nm wide, which is closest to the effective channel width per fin (the perimeter wrapped by the gate)?

  1. A106 nm
  2. B6 nm
  3. C56 nm
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Answer: A. 106 nm

In a FinFET the gate wraps both sidewalls and the top of the fin, so the effective channel width per fin is roughly 2 × height + width = 2 × 50 + 6 = 106 nm. Taller fins increase drive current without increasing footprint.

  • A. Correct. 2 × 50 + 6 = 106 nm.
  • B. 6 nm is only the fin width and ignores the sidewalls.
  • C. 56 nm counts only one sidewall and the top.
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More Advanced transistors (FinFET and GAA) questions

  1. To adequately suppress short-channel effects in a FinFET, what is generally required of the fin width?
  2. In high-k/metal gate transistors, why is a very thin layer such as SiO2 often placed between the silicon and the high-k film (such as hafnium oxide)?
  3. Why have III-V compound semiconductors such as InGaAs been researched as future nMOS channel materials?
  4. Which correctly describes the transistor performance metric "Ion/Ioff ratio"?
  5. How did the subthreshold swing (SS) generally change with the move from planar transistors to FinFETs?