What is Flip-flop?

Flip-flop in the explanations

• A D flip-flop captures its D input on the rising (or falling) clock edge and holds it until the next edge; changes between edges do not affect the output.

  Which correctly describes the operation of a D flip-flop?

• For a flip-flop to capture correctly, data must be stable for a certain time before the clock edge—the setup time.

  Which correctly describes the setup time of a flip-flop?

• A JK flip-flop sets with J = 1, K = 0, resets with J = 0, K = 1, holds with J = K = 0, and toggles with J = K = 1.

  What does a JK flip-flop do when a clock edge arrives with …

Questions that mention Flip-flop (10)

1. Which correctly describes the operation of a D flip-flop?
2. Which correctly describes the setup time of a flip-flop?
3. What is the state called when a flip-flop receiving an asynchronous signal violates setup or hold time and its output is temporarily neither 0 nor 1?
4. What does a JK flip-flop do when a clock edge arrives with J = 1 and K = 1?
5. A T flip-flop whose output toggles on every clock edge produces an output at what multiple of the clock frequency?
6. Which correctly describes the hold time of a flip-flop?
7. In static timing analysis, which timing violation occurs when a signal changes too soon after the clock edge, so a flip-flop cannot correctly hold the previous data?
8. Which correctly describes the operation of a D latch?
9. In a combinational circuit, what is the unwanted pulse that appears briefly at the output when an input changes, due to different delays along different paths?
10. What is the main purpose of clock tree synthesis (CTS) in the place-and-route stage?

Related terms

Hold time Setup time Metastability PLL (phase-locked loop) STA (static timing analysis) Combinational circuit Glitch Clock skew De Morgan's theorem Decoder