What is Metastability?
A state in which a flip-flop's output stays between 0 and 1 for a while when setup or hold time is violated. Asynchronous signals are passed through two flip-flops (a synchronizer) to guard against it.
Field: Logic circuits
Metastability in the explanations
Violating either can capture wrong values or cause metastability.
Which correctly describes the setup time of a flip-flop?Passing signals directly between asynchronous clocks causes metastability and lost data.
What is the verification called that uses dedicated tools t…
Questions that mention Metastability (2)
Related terms
Setup time Flip-flop Hold time Clock skew Combinational circuit De Morgan's theorem Decoder Full adder Glitch Gray code