Place logic gates and D flip-flops, wire them together and flip the input switches to see how signals propagate right away. Load examples such as a half adder, full adder, SR latch and 2-bit counter, and get a truth table generated automatically for circuits without a clock.
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Logic circuit simulator
Parts
The signals never settle (the circuit is oscillating). Check your feedback loops.
Add parts from the Parts list and drag them to move them. To wire, tap an output pin and then an input pin; tap an input switch to toggle it between 0 and 1. Select a part or wire and press “Delete selected” to remove it.
Truth table
See it as a graph
Other inputs stay at their current values while the chosen input varies from 1/4 to 4 times its current value. The red dot is the current value.
Basic logic gates and truth tables
AND outputs 1 only when all its inputs are 1, OR outputs 1 when any input is 1, and NOT swaps 0 and 1. NAND and NOR are AND and OR with their outputs inverted; XOR outputs 1 when its two inputs differ, and XNOR when they are equal. Place two inputs and one output, connect a single gate between them, and the truth table is built automatically. With n inputs there are 2ⁿ combinations: 4 rows for two inputs and 64 for six. Swap in different gates and compare the tables—NAND is exactly AND inverted, and XNOR is exactly XOR inverted. The “2-to-1 multiplexer” example shows how gates can steer data: when the select signal C is 0, input A appears at output X, and when it is 1, input B does.
Half adders, full adders and how carry works
Adding one-bit A and B gives a sum of A XOR B and a carry of A AND B. 1 + 1 is 10 in binary, so the sum is 0 and the carry is 1. Load the “Half adder” example (X is the sum, Y the carry) and toggle A and B to check. A full adder also adds the carry-in Cin from the lower digit; it can be built from two half adders and one OR gate, with sum A⊕B⊕Cin and carry AB + Cin(A⊕B). The “Full adder” example (C is the carry-in Cin, X the sum, Y the carry) has a truth table that shows that the sum is 1 when an odd number of the three inputs are 1 and the carry is 1 when two or more are, including 1 + 1 + 1 = 11 in binary. Feed a half adder's carry into a full adder's Cin and you have a 2-bit adder; with only four inputs, you can check every answer in its 16-row truth table.
NAND and NOR are universal gates
Tie both inputs of a NAND to the same signal and it becomes a NOT; put a NOT after a NAND and you get an AND. By De Morgan's theorem, inverting each input and feeding them into a NAND gives an OR, so any logic circuit can be built from NAND gates alone. The “XOR from NAND gates only” example uses four NANDs: the first output N1 = NAND(A, B) feeds both NAND(A, N1) and NAND(B, N1), and a final NAND combines those two. Confirm that its truth table matches XOR. NOR is universal too, and if you build the same structure with every NAND replaced by a NOR, the result is XNOR instead. In CMOS a two-input NAND takes just four transistors, fewer than an AND, which is why real logic is so often built from NAND and NOR gates.
Combinational vs sequential circuits and the NOR SR latch
Adders and multiplexers are combinational circuits: their outputs depend only on the current inputs. Add feedback that routes an output back to an input and the circuit becomes sequential, able to remember past inputs. The “SR latch (NOR)” example (A is S, B is R, X is Q and Y its complement) feeds each NOR's output into an input of the other NOR. Setting S = 1 makes Q 1, setting R = 1 makes Q 0, and returning both to 0 holds the previous state. With S = R = 1, both Q and the other output, which should be its complement, go to 0; that breaks the latch's assumption that the two outputs are opposites, so this input is called forbidden. In this simulator you toggle one switch at a time, so whichever input stays at 1 longer decides the result, but if both return to 0 at the same moment in a real circuit, the final state is unpredictable and the latch may oscillate or go metastable.
D flip-flops and a 2-bit counter
A D flip-flop copies D to Q only at the rising edge, the instant the clock goes from 0 to 1, and holds Q at all other times even if D changes. Connect an input switch and the clock to a D flip-flop, pause the clock and toggle D: Q stays put until you press “Step one clock.” The D flip-flop here has only a Q output, so the “2-bit counter” example inverts Q with a NOT gate and feeds it back to D. Q then flips on every rising edge, so its frequency is half the clock frequency. The upper-bit flip-flop gets the same clock, with Q1 XOR Q0 on its D input. It flips only when the lower bit is 1, so it switches at a quarter of the clock frequency, and the outputs (Y, X) count 00→01→10→11→00. Because every flip-flop runs from the same clock, this is a synchronous counter.
Adding one-bit A and B gives sum = A XOR B and carry = A AND B; for example, 1 + 1 = binary 10, so the sum is 0 and the carry is 1. A full adder, which also adds a carry-in, can be built from two half adders and an OR gate, with sum = A⊕B⊕Cin and carry = AB + Cin(A⊕B). CPU arithmetic units (ALUs) are built on full adders combined with fast carry schemes.
Feeding the same value A to both inputs gives NOT(A AND A) = NOT A, so the NAND acts as an inverter. With NOT available, AND is NAND followed by NOT, and OR is NAND of inverted inputs (De Morgan), so any logic circuit can be built from NAND alone; NOR is equally universal. In practice, tying inputs together increases input capacitance, so a dedicated inverter is more efficient.
A T flip-flop (T = 1) toggles on every clock edge, so its output completes one cycle every two clocks—half the clock frequency—with an exactly 50% duty cycle. Chaining them gives ÷4, ÷8 and so on, forming dividers and ripple counters. PLL feedback loops also use dividers, synthesizing multi-GHz frequencies from, say, a 100 MHz reference by changing the division ratio.
FAQ
Is it free, and do I need to install anything?
It is free, with no sign-up or installation. It runs in your browser on both computers and smartphones; on a phone, tap wherever the instructions say click.
Can I save my circuit or share it with someone?
Your circuit is saved in your browser, so you can pick up where you left off next time. Press “Copy share link” to get a URL that contains the circuit; anyone who opens it can run the same circuit, which is handy for class assignments or explaining a design.
Why does it say the signals never settle?
There is a loop in which an output comes back to its own input inverted, so the value keeps flipping between 0 and 1 and never settles. For example, connecting a NOT gate's output to its own input makes it alternate forever. In real hardware, a ring of an odd number of inverters oscillates at a period set by the gate delays and is used as a ring oscillator. Loops in which the inversions cancel out over one trip, as in an SR latch, settle into a stable state.
How many inputs can the truth table handle?
A truth table is shown for circuits with 1 to 6 inputs (up to 2⁶ = 64 rows), at least one output and no clock, flip-flops or feedback loops (such as an SR latch). Such circuits have outputs that depend on past states, so a table of inputs alone cannot describe them.
Does it simulate gate propagation delay?
No. Whenever an input changes, it repeatedly evaluates the logic values until nothing changes, so gate delays and timing such as setup and hold times are not modeled. As a result, glitches—brief pulses caused by differences in path delay—do not appear either. To check timing, use gate-level simulation with delay information or static timing analysis (STA).