Ion Implantation Explained: Dose, Depth and Implanters
Ion implantation is a chipmaking step that adds impurity atoms, such as boron or phosphorus, to silicon. The atoms are turned into electrically charged particles (ions), sped up, and fired into the silicon. The number of ions is counted from the current, and the depth is set by how hard they are accelerated. So "where, how many and how deep" can all be set precisely. After implanting, the wafer is heated to repair damage to the crystal.
What you'll learn
- Why impurities are added to silicon (in a sentence)
- The four stages inside an ion implanter
- How the amount (the dose) and the depth are set
- How resist decides where the ions go
- Crystal damage and annealing, and "channeling," where ions go too deep
- Why implantation replaced thermal diffusion, the types of implanters, and the main makers
Prerequisites: a rough idea of n-type and p-type ("What Is a Semiconductor?"), and the fact that chips are built on a wafer by repeating three steps: adding a film, printing a pattern, and etching ("How Are Chips Made?").
In everyday life
A high-end smartphone chip holds more than 10 billion transistors, which are tiny switches ("What Is a Transistor?"). Every transistor contains small regions that carry current in different ways. These regions sit side by side in a fixed layout.
Each region is made by mixing a tiny amount of another element into a small part of the silicon. The amount is very small: for example, one atom for every 5 million silicon atoms (the example in "What Is a Semiconductor?"). Ion implantation is the main way to put "a tiny amount, in exactly the right place."
In a fab, one wafer goes through ion implantation many times. A wafer is the silicon disc that chips are built on. Each time, the element or the location changes. Implantation is one of the basic steps of chipmaking, along with adding films, printing patterns and etching.
Why add impurities?
Pure silicon conducts electricity poorly. Add a little phosphorus or arsenic, and there are more free electrons. The silicon becomes "n-type." Add boron, and current is carried by holes, the gaps left where electrons are missing. The silicon becomes "p-type." The boundary between n-type and p-type is what makes diodes and transistors work. "What Is a Semiconductor?" explains how (for a table, see "n-type vs. p-type").
For a transistor to work as intended, the impurities must be added exactly as planned. Three things have to be set: where they go, how many go in, and how deep. Ion implantation lets each of these three be set separately.
How it works 1: four things happen inside the tool
An atom normally has no electric charge. Strip one electron from an atom, and you get a particle with a positive charge. This is called an ion. Because it is charged, an electric voltage or a magnet can push it or bend its path. Inside the tool, ions pass through the four stages below. This article describes them in a common order.
① At the entrance of the tool, electrons are fired at a gas that contains the impurity. This makes ions. This part is called the ion source. For boron, for example, a gas called boron trifluoride (BF3) is used. A voltage then pulls the new ions out into the tool.
② A gas does not produce just one kind of ion. Boron trifluoride gives ions of boron alone, and also ions with fluorine still attached. So a magnet bends the ions' path. Take ions that carry the same charge and were pulled out by the same voltage. The heavier ones bend less. Only ions of the target mass pass through a slit at the exit. This sorting is called mass analysis.
③ The selected ions are accelerated further by a voltage, to bring them to the target energy. The energy an ion gains depends on the voltage and on the ion's charge. It is measured in keV (kiloelectronvolts). An ion with the charge of one electron, accelerated by 10,000 volts, has 10 keV. Note that the order varies: some tools accelerate the ions before sorting them.
④ The stream of ions (the beam) is not wide enough to cover the whole wafer at once. So the beam is swept from side to side, or the wafer is moved, to hit the whole surface evenly. The ions' path is kept in a vacuum, with the air pumped out, so that ions do not hit air molecules on the way.
How it works 2: amount and depth are set separately
The number of ions implanted per square centimeter is called the dose. Doses in use range from about 10¹¹ (100 billion) to 10¹⁶ (10 quadrillion) per cm² (Stanford lecture notes). The largest is 100,000 times the smallest.
The number is counted from the current of ions reaching the wafer. Current is the amount of charge that flows each second. Divide it by the charge of one ion, and you get the number of ions arriving. For example, a current of 1 mA (a milliamp, a thousandth of an amp) brings about 6×10¹⁵ ions each second. This assumes each ion carries the charge of one electron. The part that catches this current and measures it is called a Faraday cup.
The depth is set by the energy. Each time an ion hits a silicon atom, it loses energy, and in the end it stops. The faster an ion enters, the deeper it travels before stopping. At the same energy, lighter ions go deeper. For example, boron at 100 keV stops at about 0.3 µm (0.0003 mm) on average (City University of Hong Kong lecture notes).
Each ion stops after a series of random collisions, so the stopping depth varies a little from ion to ion. Taken together, they form a peak of concentration a little below the surface. The average stopping depth is called the projected range.
How it works 3: resist decides where ions go
To print patterns, chipmakers use a film of chemical whose properties change when light hits it. This film is called photoresist, or resist for short. In ion implantation, the resist serves as a cover over places that should get no ions. "What Is EUV Lithography?" explains how patterns are printed.
Ions that hit the resist stop inside it and never reach the silicon below. Ions enter only the exposed areas. So the impurity regions form in the shape of the pattern. Afterward, the resist is removed.
Resist can serve as a cover because implantation runs near room temperature (UC Berkeley lecture notes). Resist cannot take heat. So methods that soak impurities in at high temperature cannot use it as a cover.
Most chips are built with two kinds of transistors with opposite properties, placed side by side ("What Is CMOS?"). So implantation is repeated with separate patterns: one for the areas that should be n-type, and one for the areas that should be p-type.
How it works 4: implanting damages the crystal
In a crystal, silicon atoms are lined up in a regular pattern. An incoming ion knocks many atoms out of place before it stops, and this disturbs the pattern. At high doses, the pattern near the surface can be completely destroyed (Stanford lecture notes).
What's more, most of the impurity atoms that have just stopped are not sitting at proper sites in the crystal. As they are, they produce almost none of the n-type or p-type behavior.
So after implanting, the wafer is heated to a high temperature. This repairs the pattern and settles the impurities into crystal sites. This heat treatment is called annealing. But heat makes impurities spread, so ways to heat for only a very short time have been developed. "Dopant Diffusion in Silicon" explains how they spread. "Furnace anneal vs. RTA vs. laser anneal" compares the methods.
Slipping through straight "gaps": channeling
The atoms in a crystal are lined up in a regular pattern. Seen from certain directions, straight gaps run between the rows of atoms. If an ion enters along such a gap, it hits few atoms and goes much deeper than expected. This is called channeling.
If depths vary, the profile does not come out as planned. So the usual practice is to tilt the wafer by about 7°, away from the gaps (City University of Hong Kong lecture notes). Tilting does not prevent channeling completely. So another method first deliberately disorders the surface crystal (pre-amorphization implant (PAI)).
Why it replaced thermal diffusion
Before ion implantation spread, the main method was different. Silicon was heated to a high temperature in a gas containing the impurity, which soaked in from the surface. This is called thermal diffusion. According to the Semiconductor History Museum of Japan, ion implantation replaced much of this method from the 1970s on.
A big reason is that the amount and the depth can be set precisely, and the same way every time. The amount is counted from the current, and the depth is set by the accelerating voltage. UC Berkeley lecture notes give a rough guide to how far the amount can be off target. It is a few percent for implantation, and 20–30% for methods that add impurities from the surface at high temperature. Being able to use resist as a cover is another advantage.
But thermal diffusion has not disappeared. It is still used in steps that form deep regions, and for solar cells and other products. "Thermal diffusion vs. ion implantation" compares the two methods in a table.
Three types of implanters
Implanters fall into three broad types, by the range of dose and energy they handle best. Axcelis, for example, says in its annual report that it offers all three types.
- High current implanters: A strong current fires many ions in a short time. They are used for implants with large doses, such as the transistor's current entrance and exit (the source and drain).
- Medium current implanters: These implant low to medium doses with precision. They are used to adjust the voltage at which a transistor starts to turn on (the threshold voltage), among other things.
- High energy implanters: These implant deep, at energies from several hundred keV into the MeV range (megaelectronvolts; 1 MeV is 1,000 keV). They are used for the deep regions that transistors sit in, and for camera sensors ("How Do Image Sensors Work?").
All three types share the four stages of How it works 1. What differs is how strong a current they can make, and how hard they can accelerate.
The main makers
The main makers of ion implanters include the four companies below. What is written here is what each company says in its own announcements or on its website (as of October 2026).
- Applied Materials (US): In November 2011, it completed its purchase of Varian Semiconductor, an ion implanter maker. Its tools include the medium current "VIISta 900XP."
- Axcelis Technologies (US): Its business began in 1978, and it became independent from Eaton in 2000. It offers high current, medium current and high energy tools on a common platform called "Purion." In 2022, it announced that a tool reaching up to 15 MeV had been approved for image sensor production.
- Sumitomo Heavy Industries Material Solutions (Japan): In January 2026, it changed its name from Sumitomo Heavy Industries Ion Technology. In January 2025, it took over the laser anneal equipment business, and it now handles that along with ion implanters.
- Nissin Ion Equipment (Japan): It was set up in 1999 within the Nissin Electric group, as an ion implanter company. Its tools include medium current implanters and implanters for power semiconductors.
For a map of all types of manufacturing equipment, see "Semiconductor Manufacturing Equipment."
Source gases and safety
Phosphine and arsine are used as sources of phosphorus and arsenic. Both are extremely toxic gases. US medical guidance on arsine comes from the CDC and ATSDR (the Agency for Toxic Substances and Disease Registry). It says people notice arsine's smell only at about 10 times the level allowed for workers. In other words, by the time you notice the smell, the level is already dangerous. So fabs handle these gases inside tightly controlled equipment.
Common misconceptions
Myth: The n-type or p-type region is finished as soon as the ions are implanted
In fact, right after implanting, most impurity atoms are not at proper crystal sites, and the crystal is damaged. Only after annealing repairs the pattern and settles the impurities into crystal sites do they work as n-type or p-type. The myth comes from the word "implant," which makes it sound as if putting atoms in is the whole job.
Myth: Raising the energy also raises the amount of impurity that goes in
In fact, the amount is set by the dose (current and time), and the depth by the energy. They are two separate dials. Raise the energy while keeping the dose the same, and the concentration peak moves deeper and becomes lower and wider. The myth arises because both amount and depth sound like "strength."
Myth: Impurities pile up on the surface, so the surface has the highest concentration
In fact, the ions burrow into the silicon, and the concentration peaks a little below the surface. In thermal diffusion, which soaks impurities in from the surface, the surface does have the highest concentration. That picture is easy to mix up with implantation. Being able to move the peak by changing the energy is a strength of ion implantation.
By the numbers
| Number | What it measures |
|---|---|
| 10¹¹–10¹⁶ | Range of the number of ions implanted per cm² (Stanford lecture notes) |
| About 6×10¹⁵ | Ions arriving each second with a 1 mA current, if each carries the charge of one electron (calculated) |
| About 0.3 µm | Average stopping depth of boron at 100 keV (City University of Hong Kong lecture notes) |
| About 7° | An example of the angle the wafer is tilted to avoid channeling (same source) |
| A few % and 20–30% | A rough guide to how far the amount is off target: the first for ion implantation, the second for adding impurities from the surface at high temperature (UC Berkeley lecture notes) |
| Up to 15 MeV | The energy Axcelis says its high energy tool can reach (company announcement, 2022) |
As an example, let's add 10¹⁵ boron atoms per cm² over a whole wafer 300 mm across. The wafer's area is about 707 cm², so that is about 7×10¹⁷ ions. By weight, that is only about 13 µg (about 1/80,000 of a gram).
With a 1 mA beam, the job takes about 2 minutes. To keep it simple, this assumes the beam is always on the wafer. The count looks huge, but the amount is far too small to see, and it is counted to within a few percent.
Learn more
- In this series: "How Are Chips Made?" (the whole process), "What Is Etching in Semiconductors?" (the step that cuts material using the same kind of resist pattern), "What Is a Silicon Wafer?"
- Related explainers: "Dopant Diffusion in Silicon" (how annealing spreads impurities), "What Is a Semiconductor?", "What Is CMOS?"
- Compare in a table: "Thermal Diffusion vs Ion Implantation", "EDX vs SIMS" (ways to measure how implanted impurities are spread with depth)
- Try the numbers: the resistivity and doping calculator (how much the impurity concentration changes how easily silicon conducts)
- Go deeper with terms (process): ion implantation / halo implant (pocket implant) / retrograde well / plasma doping
- Go deeper with terms (annealing and measurement): transient enhanced diffusion (TED) / SIMS (secondary ion mass spectrometry)