What Is Semiconductor Packaging? How Chips Are Packaged

15 min read · Updated: October 23, 2026

A semiconductor package is the case that holds a silicon chip, protects it and connects it to a device's circuit board. It spreads the chip's very fine contacts out to terminals far enough apart to solder. It is also the path that carries heat away. Today, "advanced packaging," which puts several chips in one package, can decide how well a product performs, so it often makes the news.

What you'll learn

  • The four jobs of a package: protect, connect, cool and spread out the contacts
  • The order of the back-end steps that turn a wafer into parts
  • How wire bonding and flip chip differ
  • How package types differ: DIP, QFP, QFN, BGA, WLCSP and more
  • The tests that check durability, and how all this leads to advanced packaging

Prerequisites: it helps to know that chips are made many at a time on a round plate called a wafer, then cut apart. "How Are Chips Made?" explains this.

In everyday life

Look at the circuit board of a PC or game console, and you will see several black, square parts. In most cases, what you see is not the chip itself. It is the resin wrapped around the chip. The whole part, including this casing, is called a package. "What Is an Integrated Circuit?" sorts out the words chip, die and package.

Packaging also shows up more and more in the news. Many AI GPUs for data centers place the compute chip and memory side by side in one package. In July 2024, Taiwan's TSMC said it had more than doubled its capacity for this kind of assembly from the year before. Even so, it could not keep up with demand. Packaging is no longer a minor step.

The four jobs of a package

A chip is a thin piece of silicon cut from a wafer. A bare chip cannot simply be mounted on a device's circuit board and used. A package has four main jobs.

  • Protect: Chips are thin and break easily. Moisture and dirt can damage the wiring on their surface. Wrapping them in resin or other materials protects them from shocks and moisture.
  • Connect: The chip has small metal contact points, called pads, where electricity enters and leaves. The package links these pads to the wiring on the board, carrying signals and power. If the path is long, fast signals get distorted more easily, and the supply voltage swings more easily.
  • Cool: A working chip turns almost all of the power it uses into heat. The package passes that heat on to the board or a heat sink.
  • Spread out: The chip's pads are lined up very close together. The package spreads them out to a spacing that can be soldered to a device's board.

Here is an example of the fourth job. On packages with solder balls on the bottom, the terminals are about 0.4–1.27 mm apart (from this site's comparison table). The chip's pads are packed far more tightly. So wiring inside the package spreads them out to make the connection.

The back end: from wafer to finished part

Packaging is done in the stage called the back end. Let's walk through the steps in order, using a typical package whose chip is connected with fine wires. The table in "Front-end vs. back-end process" shows how the back end differs from the front end.

Eight back-end steps: three done on the whole wafer, then five done one chip at a time On the whole wafer ① Wafer test Probe with needles ② Back-grinding Thin the back ③ Dicing Cut into chips One chip at a time ④ Die attach Fix to a base ⑤ Connect pads Wires or bumps ⑥ Molding Seal in resin ⑦ Marking Engrave a label ⑧ Final test Check the part Shipping
The main back-end steps for a package that uses fine wires. Steps ①–③ are done on the whole wafer, and ④–⑧ on one chip at a time. Some sources count ① as the last step of the front end. What this figure leaves out: cleaning and visual inspection, plating and shaping the leads, and the test that runs some products at high temperature. For flip chip and other methods, the order and the steps change.
  1. Wafer test: While the chips are still on the wafer, fine needles touch each chip's pads to check that it works. This is also called wafer probe or wafer sort. The positions of bad chips are recorded, and those chips are not packaged. That way, the costly packaging work is not wasted on them.
  2. Grinding the back: The wafer is ground from the back to make it thinner. A 300 mm wafer is about 0.775 mm thick. It is ground to a fraction of that, and in thin cases to 0.05 mm or less. This step is called back-grinding.
  3. Cutting apart: A thin spinning blade or a laser cuts the chips, which sit in a grid, into single pieces. This step is called dicing. Each piece of silicon cut out is also called a die. For very thin chips, the order can change: the wafer is cut partway first, then ground from the back until the chips separate.
  4. Fixing to a base: The die is attached to a base with adhesive or solder. The base is either a thin metal frame or a small board with wiring inside. This step is called die attach, or die bonding.
  5. Connecting the pads: The die's pads are connected to the base's terminals with fine metal wires or tiny metal balls. The next section looks at these two methods in detail.
  6. Sealing in resin: Melted resin is poured into a mold, and the die and wires are sealed in as one solid block. This step is called molding, or encapsulation.
  7. Marking: A laser or similar tool engraves the company logo, the part number and a code for when the part was made. If a problem shows up later, this code tells you when the part was made.
  8. Final test: The finished part is run and checked at set temperatures and voltages. This is called the final test, and only parts that pass are shipped. "Wafer test vs. final test" compares the two tests.

Connecting the chip: wire bonding and flip chip

The first method places the chip face up. Fine metal wires connect the pads along its edges to the base's terminals, one wire at a time. This is called wire bonding. The wires are about 15–50 µm thick (according to a wire maker's product page). A µm (micrometer) is a thousandth of a millimeter, so the wires are a fraction of the width of a human hair (about 0.09 mm).

For a long time, the wires were made of gold, which does not corrode and is easy to work with. But as the price of gold rose, many makers switched to cheaper copper wire in the 2010s. Wire bonding is cheap and flexible in layout. It is still used in many products, such as microcontrollers, memory and analog chips.

The second method starts by forming tiny metal balls of solder or copper on top of the chip's pads. These balls are called bumps. Unlike wires, bumps are not limited to the edges. They can be spread across the whole face of the chip.

The chip is then turned over, and the bumps are joined directly to the pads on the board underneath. Because the chip is flipped, this method is called flip chip. It grew out of a method that IBM put into use in the 1960s. It allows far more connections, and the paths are short, so fast signals get through more easily.

The gap between the chip and the board is filled with resin, which then hardens. This resin is called underfill. When the temperature changes, the chip and the board expand and shrink by different amounts. That difference puts stress on the bumps, and the resin shares and softens it.

Cross-sections compared: wire bonding and flip chip ① Wire bonding Chip Substrate Resin Wire Solder balls ② Flip chip Chip (flipped) Substrate Bumps Underfill Solder balls
Schematic cross-sections of a package with solder balls on the bottom. In ①, the chip sits face up and wires connect it from its edges. In ②, the chip is flipped over and connects through bumps spread across its face. What this figure leaves out: scale (real wires are much thinner), the adhesive under the chip, and the resin or metal lid over ②. The "substrate" in the figure is a small wiring board inside the package, explained later.

Flip chip suits fast chips with thousands of pads, such as CPUs and GPUs. On the other hand, it needs extra steps to make the bumps and a board with fine wiring, so it costs more. "Wire bonding vs. flip chip" lists the differences.

Package types: from metal legs to solder balls

Packages come in many types. You can tell them apart by the shape of the terminals that connect to the board outside. Here are the main types, from oldest to newest.

  • DIP (dual in-line package): Metal legs, called pins or leads, come out of two sides and point down like the teeth of a comb. The pins go into holes in the board and are soldered there. Intel's 4004 of 1971 also came in a DIP with 16 pins.
  • QFP: Leads bent outward come out of all four sides. The package sits on the surface of the board and is soldered there. Because the leads are visible, it is easy to inspect and to repair by hand. The name QFP stands for quad flat package.
  • QFN: No leads stick out. Instead, flat pads line the edges of the bottom. It is small and thin. Most have a metal area in the middle of the bottom that carries heat away. The name QFN stands for quad flat no-lead.
  • BGA: Small solder balls cover the whole bottom in a grid. Using the whole area lets it hold hundreds to thousands of terminals. It is widely used for CPUs, GPUs and memory. The name BGA stands for ball grid array.
  • WLCSP (wafer-level chip-scale package): The wiring and solder balls are made right on the wafer, before it is cut apart. The package ends up about the same size as the chip. It is common for small chips in smartphones. It is one kind of wafer-level package.
Side views of package types compared: DIP, QFP, QFN, BGA and WLCSP DIP Pins into holes QFP Leads on 4 sides QFN Flat pads below BGA Solder balls below WLCSP About chip-sized Chip Resin Substrate
Schematic side views of the main package types, with the position of the chip inside drawn over each one. What this figure leaves out: scale, the real number of leads and balls, the wiring from chip to terminals, and the QFP's front and back leads. Even packages with the same name vary widely in size and number of terminals from product to product.

Types with legs or pads, such as DIP, QFP and QFN, place the chip on a thin metal frame. This frame is called a lead frame, and part of it becomes the terminals. "BGA vs. QFP vs. QFN" compares three of these types.

Among wafer-level types, there is also "fan-out," which spreads the wiring beyond the edges of the chip. It can place terminals over an area larger than the chip, and it can be made thin. According to the research firm Yole, the processor in the 2016 iPhone 7 (the A10) was packaged with TSMC's fan-out method. "Fan-in vs. fan-out WLP" compares the two.

The package substrate: a small wiring board inside

In most BGAs, the chip sits on a small wiring board. This is called a package substrate. It stacks many thin layers of resin and copper wiring. It connects the chip's fine pads to the solder balls on the bottom. It is the part that handles the fourth job, spreading out the contacts.

Substrates for high-performance chips stack many layers of wiring far finer than a device's circuit board. Between the wiring layers is a resin film that does not conduct electricity. A widely used film for this is ABF, developed by Ajinomoto.

Carrying heat away: the package is a heat path

If a chip gets too hot, it can behave unreliably, and its life gets shorter. The chip's heat escapes through the package to the board or a heat sink. How hard it is for heat to flow is called thermal resistance. It changes a lot with the package type and materials.

For example, the metal area on the bottom of a QFN is soldered to the board, so heat goes straight into the board. In a high-power CPU, the chip is mounted by flip chip. A metal lid is pressed against the back of the flipped chip, spreading the heat before passing it to the heat sink. To estimate a chip's temperature from its power use and thermal resistance, try the junction temperature calculator.

Materials: the resin and substrate matter too

The molding resin is an epoxy, a resin that hardens when heated. It is mixed with lots of fine powder called silica, the same substance glass is made of. The powder makes up much of the weight. More powder makes the resin expand with heat more like silicon does, and helps it absorb less moisture.

The makers of the machines that grind and cut wafers are introduced in "Semiconductor Manufacturing Equipment."

Making sure it lasts

A packaged chip may be used for more than 10 years, in a car or outdoors. So its durability is checked with tests that squeeze harsh conditions into a short time. These are called reliability tests.

One test swings between cold and hot, hundreds of times. The chip, resin and substrate expand by different amounts when heated. The test checks whether the solder joints crack or the resin peels away over many cycles. This test, which moves between −55 °C and 125 °C for example, is called temperature cycling.

Another concern is moisture. The molding resin slowly absorbs water. The industry group JEDEC has a standard test for this. Parts are kept at 85 °C and 85% humidity, with voltage applied, for about 1,000 hours. It checks whether the metal inside corrodes or current leaks.

Moisture also causes trouble when parts are soldered to a board. The parts are heated in an oven to melt all the solder at once. They reach around 250 °C, and the absorbed water can suddenly turn to steam and crack the package from the inside. Because the package bursts like popcorn, this is also called the popcorn effect. Sensitivity to moisture is rated in levels called MSL (moisture sensitivity level). Sensitive parts are shipped sealed in bags with a drying agent.

"Arrhenius Equation in Chips" explains how results from hot tests are turned into an expected life at normal temperatures. "HTOL vs. THB vs. HAST vs. TC vs. HTS" compares the types of test.

Advanced packaging: toward chiplets and HBM

More and more, several chips are put into one package and made to work like a single part. These techniques are together called advanced packaging. Two key examples are chiplets and HBM. Chiplets split a large circuit into smaller chips placed side by side. HBM stacks memory chips and places the stack next to the GPU. "What Is a Chiplet?" and "What Is HBM?" go into detail. "2.5D vs. 3D packaging" explains placing chips side by side versus stacking them.

Common misconceptions

Myth: A package is just a plastic box to hold the chip

In fact, inside the casing there is a wiring board or a metal frame. It carries hundreds to thousands of electrical paths. The package is also a path for heat. Its design affects how fast the chip can run and how much power it can use. The myth is easy to fall for because all you see from outside is black resin.

Myth: The chip inside is about as big as the package

In fact, for many types the chip is much smaller than its package. Intel's 4004 chip was about 3 mm × 4 mm, and it came in a DIP with 16 pins. The pins sit 2.54 mm apart, eight on each side. Seven gaps of 2.54 mm plus a margin at each end makes the package nearly 2 cm long. On the other hand, some types, such as WLCSP, are about the same size as the chip.

Myth: Packaging is the easy part, technically

In fact, it is a set of precise techniques. Chips about 0.05 mm thin must be handled without breaking them. Thousands of pads must be joined at once without any misalignment. In advanced packaging, the bumps linking one chip to another are only a few tens of µm apart. The myth arises because packaging gets less attention than making front-end circuits smaller.

By the numbers

NumberWhat it means
About 0.775 mmStandard thickness of a 300 mm wafer (SEMI standard). Thin chips are ground to 0.05 mm or less (DISCO's explanation)
15–50 µmRange of bonding wire thickness (Nippon Steel Chemical & Material product page)
16Number of pins on the package (DIP) of Intel's 4004 of 1971
1,700Number of socket contacts for Intel's 12th–14th generation desktop CPUs (LGA1700)
−55 to 125 °CExample conditions for temperature cycling (JEDEC standard)
85 °C, 85%, about 1,000 hoursConditions for the moisture-and-voltage test (JEDEC standard)
245–260 °CPeak soldering oven temperature used to classify moisture sensitivity (J-STD-020)

In about 50 years, the number of terminals grew from 16 to more than a thousand. Over that time, the terminals changed form: from legs, to flat pads on the bottom, to solder balls. As chips grew more powerful, the packages linking them to the outside needed more terminals and finer wiring.

Learn more

Read next

Articles in the series “How chips are made”

  1. How Are Chips Made? The Semiconductor Manufacturing Process
  2. What Is a Silicon Wafer? How Wafers Are Made, Step by Step
  3. What Is EUV Lithography? How 13.5 nm Light Prints Chips
  4. What Is Semiconductor Packaging? How Chips Are Packaged
  5. What Is a Cleanroom? Why Chip Fabs Fight Dust
  6. SEM and TEM Explained: How Electron Microscopes Work
  7. Plasma in Semiconductor Manufacturing: Etching and Sheaths
  8. What Is a Printed Circuit Board (PCB)? Layers, Vias, FR-4
  9. How Are Chips Tested? Wafer Test, Final Test and Burn-In
  10. What Is Etching in Semiconductors? Wet vs Dry Explained
  11. What Is Thin-Film Deposition? CVD, PVD and ALD Explained
  12. What Is CMP in Semiconductors? Chemical Mechanical Polishing
  13. Ion Implantation Explained: Dose, Depth and Implanters
  14. What Is Photolithography? How Chip Patterns Are Printed

Questions on this topic: Packaging and assembly

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