Fan-In vs Fan-Out WLP: Key Differences Explained
Both are packages in which the redistribution layer (RDL) and solder balls are formed while still in wafer form, and then the wafer is diced. Fan-in WLP is built directly on the original wafer, so terminals can be placed only within the die area and the package is almost the same size as the die. Fan-out WLP places known-good dies cut from the wafer at intervals and embeds them in resin to make a reconstituted wafer, then extends the redistribution beyond the edges of each die. It allows many terminals and can combine multiple dies, but adds process steps, and warpage and die position shift become issues.
| Aspect | Fan-in WLP | Fan-out WLP |
|---|---|---|
| Redistribution area | Only within the die area | Extends onto the resin outside the die |
| Package vs die area | Almost the same (chip-scale) | The package is larger |
| I/O count (typical) | Lower. Set by die area and ball pitch, from a few to a few hundred | Higher. Terminals can also be placed outside the die, sometimes exceeding a thousand |
| Starting point for manufacturing | The original device wafer | A reconstituted wafer of known-good dies placed on a carrier and embedded in mold resin (panel-based methods also exist) |
| Substrate | None | Mostly none. The redistribution layer acts as the substrate, allowing a thin package (high-performance parts may also be mounted on a substrate) |
| Multiple dies | A single die only | Multiple dies and passive components can be combined in one package |
| Main issues | With large dies, the thermal-expansion mismatch with the printed circuit board shortens solder-joint life | Warpage from the thermal-expansion mismatch between silicon and resin, die position shift during molding (die shift), fine redistribution on resin |
| Cost | Low. Few process steps | Higher than fan-in. Die placement, molding and redistribution on resin add steps |
| Main uses | Small chips for smartphones and similar devices: power ICs, RF components, sensors, audio ICs and so on | Smartphone application processors, RF modules, integrating multiple dies, and connecting high-performance chiplets |
Figures are typical orders of magnitude and vary by process generation and product.