What is ALD?

Atomic layer deposition. A deposition method that repeats self-limiting surface reactions of precursor gases to control film thickness one atomic layer at a time.

One ALD (atomic layer deposition) cycle Precursor A Self-limiting Purge Remove excess A Precursor B Forms one layer Purge Remove byproducts Repeat About 0.1 nm per cycle; thickness is set atom layer by atom layer

Field: Deposition (CVD and PVD)

ALD in the explanations

Questions that mention ALD (17)

  1. Which is a characteristic of ALD (atomic layer deposition)?
  2. Which is an example of a typical material deposited by ALD?
  3. What is an advantage of plasma-enhanced ALD (PEALD)?
  4. What is the approximate film thickness deposited in one ALD cycle?
  5. In ALD, what is the temperature range called in which self-limiting surface reactions keep the thickness per cycle constant?
  6. Which is an example of the precursors used to deposit HfO2 gate dielectrics by ALD?
  7. Why are high-k materials such as zirconium oxide used for the dielectric film of DRAM capacitors?
  8. Which ferroelectric material, compatible with CMOS processes, has recently attracted attention for FeRAM and ferroelectric transistors (FeFETs)?
  9. Which technique, used to make the thin fins of FinFETs, uses sidewall spacers to create patterns finer than the lithography limit?
  10. In manufacturing nanosheet GAA transistors, why is only the SiGe selectively removed from stacked alternating Si and SiGe layers?
  11. How does the thermal oxidation rate of silicon depend on crystal orientation?
  12. Which correctly describes step coverage in deposition?
  13. Which pair of source gases is used to deposit silicon nitride (Si3N4) by thermal CVD?
  14. What is the most appropriate range for the thickness of thin films handled in semiconductor manufacturing?
  15. In PVD such as sputtering and evaporation, why is it hard to coat the sidewalls and bottoms of deep trenches?

Related terms

Precursor CVD Multiple patterning Plasma GAA (gate-all-around) Step coverage Sputtering 3D NAND Photoresist CMOS

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