Advanced transistors (FinFET and GAA)

Which technique, used to make the thin fins of FinFETs, uses sidewall spacers to create patterns finer than the lithography limit?

  1. ASADP/SAQP (self-aligned double/quadruple patterning)
  2. BOPC
  3. CCMP
Show answer and explanation

Answer: A. SADP/SAQP (self-aligned double/quadruple patterning)

In SADP, a film is deposited on the sidewalls of a core pattern to form spacers, and the core is then removed, producing thin lines at twice the density of the original pattern. Repeating this twice (SAQP) gives four times the density. It is used to form regular fine patterns such as fins and wiring.

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More Advanced transistors (FinFET and GAA) questions

  1. In manufacturing nanosheet GAA transistors, why is only the SiGe selectively removed from stacked alternating Si and SiGe layers?
  2. What is the cause of self-heating, which tends to be a problem in FinFETs and SOI transistors?
  3. In highly scaled transistors, which factors are becoming increasingly important limits on performance?
  4. Which correctly describes materials such as molybdenum disulfide (MoS2), researched as channel materials for future ultra-small transistors?
  5. What is the main purpose of growing raised crystal on the fins in the source and drain of a FinFET by epitaxial growth?