What is SADP (self-aligned double patterning)?

Forming spacers on the sidewalls of a core pattern, removing the core and using the spacers as the mask to make a pitch half of what lithography alone allows. Doing it twice is SAQP.

Field: Advanced transistors (FinFET and GAA)

SADP (self-aligned double patterning) in the explanations

Questions that mention SADP (self-aligned double patterning) (3)

  1. Which technique, used to make the thin fins of FinFETs, uses sidewall spacers to create patterns finer than the lithography limit?
  2. Which correctly describes double patterning (multiple patterning)?
  3. In LELE (litho-etch-litho-etch) double patterning, what is especially strictly required?

Related terms

ALD Multiple patterning Overlay CFET (complementary FET) DTCO (design-technology co-optimization) EOT (equivalent oxide thickness) FD-SOI (fully depleted SOI) FinFET GAA (gate-all-around) Gate-last (replacement metal gate)

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