What is DTCO (design-technology co-optimization)?
Optimizing cell area and performance by considering circuit design and process technology together, as scaling becomes harder.
Optimizing cell area and performance by considering circuit design and process technology together, as scaling becomes harder.
DTCO (design-technology co-optimization) develops transistor and interconnect process technology together with standard-cell and SRAM design rules to improve area, performance and power—for example, removing fins to shorten cells, or burying power rails or moving them to the backside to free routing.
As physical scaling becomes harder, what is the practice of…CFET (complementary FET) EOT (equivalent oxide thickness) FD-SOI (fully depleted SOI) FinFET GAA (gate-all-around) Gate-last (replacement metal gate) High-k / metal gate Nanosheet Random dopant fluctuation (RDF) SADP (self-aligned double patterning)