Variation in transistor and wire delay from place to place within a single chip. STA applies separate factors to launch and capture paths (for example 1.1× and 0.9×) to analyze the most pessimistic combination.
Japanese name: OCV(オンチップばらつき)
OCV (on-chip variation) appears in 3 practice questions across 2 topics, including Timing analysis and CDC, IC design flow and EDA.
Field: Timing analysis and CDC
Answer: A. 1.05 ns
OCV derating accounts for delay varying with location even within the same chip, and for setup assumes the most pessimistic combination (slow launch side, early capture clock). The arrival time is 1.1 × (1.0 + 1.5) = 2.75 ns and the required time is 3.0 + 0.9 × 1.0 − 0.1 = 3.8 ns, so the slack is 1.05 ns. 1.40 ns is the value without derating, and 1.25 ns applies the factor to the data path only. In hold analysis the factors are applied the other way around.
Answer: B. It removes the impossible extra pessimism caused by applying separate slow and fast values to the common portion
OCV estimates the launch clock path as slow and the capture clock path as fast, but the common portion from the root to the branch point is physically the same buffers and wires, so it cannot be both slow and fast within a single edge. If the common portion has a delay of 1.0 ns and the factors are 1.1 and 0.9, the 0.2 ns difference between 1.1 ns and 0.9 ns is extra pessimism. CRPR adds this difference back to the slack, bringing the result closer to reality. It does not set the common delay to zero, and enlarging the factor is the opposite operation.
OCV derating accounts for delay varying with location even within the same chip, and for setup assumes the most pessimistic combination (slow launch side, early capture clock).
For OCV derating in setup analysis, the launch clock path a…OCV estimates the launch clock path as slow and the capture clock path as fast, but the common portion from the root to the branch point is physically the same buffers and wires, so it cannot be both slow and fast within a single edge.
In STA with OCV derating, when the launch and capture clock…OCV applies separate derating factors to data and clock paths, for example making data slower and the capture clock faster in setup analysis, to cover the worst combination.
In static timing analysis, what is the technique called tha…As an Amazon Associate I earn from qualifying purchases.
Derating Slack STA (static timing analysis) Setup time CRPR (clock reconvergence pessimism removal) Threshold voltage Asynchronous FIFO Clock domain Clock uncertainty Critical path