LSI design flow and EDA

What is the verification called that uses dedicated tools to check whether synchronizers are correctly inserted where signals pass between circuits running on different clocks?

  1. AIR drop analysis
  2. BCDC (clock domain crossing) verification
  3. CDRC
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Answer: B. CDC (clock domain crossing) verification

Passing signals directly between asynchronous clocks causes metastability and lost data. CDC verification automatically finds such crossings in the design and checks that synchronizers such as two-stage flip-flops are correctly inserted. It detects bugs that are hard to find with ordinary simulation.

  • A. IR drop analysis examines supply voltage drop.
  • B. Correct. It checks signals crossing between clock domains.
  • C. DRC checks geometric rules in the layout.
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More LSI design flow and EDA questions

  1. What is it called to reflect small fixes found late in design or during manufacturing by partially modifying the existing layout, without redoing the whole design?
  2. Which set correctly names cells with no logic function (or auxiliary ones) placed among standard cells to fill gaps, tie well potentials and suppress supply noise?
  3. What is the task called of circuit-simulating standard cell delay and power across various input transition times, load capacitances, voltages and temperatures and compiling the results into tables?
  4. In static timing analysis, what is the technique called that multiplies delays by factors to add margin for transistor and wire delays varying by location even within the same chip?
  5. Which analysis method, rather than combining worst-case values at corners, treats delay variation as probability distributions and computes the probability of meeting timing?