What is Gate-last (replacement metal gate)?
Building the transistor first with a dummy gate, then removing it after high-temperature steps such as source/drain activation and replacing it with a high-k dielectric and metal gate.
Building the transistor first with a dummy gate, then removing it after high-temperature steps such as source/drain activation and replacing it with a high-k dielectric and metal gate.
In a gate-last flow, polysilicon dummy gates go through the hot steps first; then the dielectric is planarized to expose the dummies, which are removed, and high-k and metal gates fill the resulting trenches.
Which correctly describes the gate-last (replacement metal …CMP planarizes STI fill oxide and interlayer dielectrics, removes excess metal from tungsten plugs and copper wiring, exposes dummy gates in gate-last flows and prepares surfaces for wafer bonding—dozens of steps in advanced logic.
Which combination correctly lists processes in which CMP is…Work function CMP STI (shallow trench isolation) Slurry CFET (complementary FET) DTCO (design-technology co-optimization) EOT (equivalent oxide thickness) FD-SOI (fully depleted SOI) FinFET GAA (gate-all-around)