I/O Interfaces & Buses

Why does forward error correction (FEC) become more important with PAM4 than with NRZ?

  1. APAM4 makes clock recovery impossible, so every bit is wrong
  2. BFitting four levels into the same swing shrinks the spacing to about one third, so noise causes more bit errors
  3. CPAM4 signals are encrypted and decryption errors must be fixed
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Answer: B. Fitting four levels into the same swing shrinks the spacing to about one third, so noise causes more bit errors

With the same voltage swing, two-level NRZ has the full swing between 0 and 1, but four-level PAM4 leaves only about one third of it between adjacent levels. The noise margin drops by roughly 9.5 dB, so bit errors become more likely. PCI Express 6.0 therefore adds a lightweight error-correcting code so the receiver can fix small errors before use.

  • A. Clocks can be recovered with PAM4 too.
  • B. Correct. The noise margin shrinks.
  • C. It has nothing to do with encryption.
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More I/O Interfaces & Buses questions

  1. What happens when an x4 PCI Express SSD is plugged into a full-length x16 slot on a motherboard (assuming the slot is wired for at least x4)?
  2. Which statement about the structure of PCI Express is correct?
  3. How does communication in PCI Express work?
  4. What does the PCI Express data link layer do about bit errors during transmission?
  5. How are the registers and memory of a PCI Express device made accessible to the CPU?