DMA vs Programmed I/O: Differences Explained

There are two ways to move data between a device and memory. In programmed I/O (PIO), the CPU itself reads or writes every word through registers. In direct memory access (DMA), a DMA controller moves the data on its own, and the CPU only sets up the transfer and is notified when it is done. DMA frees the CPU and handles large transfers much faster, but it needs more setup and care.

AspectProgrammed I/O (PIO)DMA
Who moves the dataThe CPU, word by word, with load and store instructionsA DMA controller or the device itself, directly to or from memory
CPU loadHigh: the CPU is busy during the whole transferLow: the CPU sets up the transfer and does other work
Throughput for large transfersLimited by the CPU speedHigh
Setup overheadNoneNeeds an address, a length or descriptors, and completion handling
Small transfersOften faster, because there is no setupThe setup cost can outweigh the benefit
ComplexitySimpleMore complex: descriptor rings, buffer alignment, cache coherency and IOMMU settings
Memory bus useThrough the CPUThe DMA engine competes with the CPU for memory bandwidth
Typical usesSmall control registers, simple sensors, legacy PIO modesSSDs and NVMe, network cards, audio buffers, ADC sample streams, GPU transfers

Figures are typical orders of magnitude and vary by process generation and product.

When to use which

PIO
When transfers are tiny or rare, and simplicity matters more than CPU time.
DMA
When transfers are large or continuous and you do not want the CPU tied up: storage, networking, streaming data.
Watch out
With DMA, make sure the CPU cache and memory agree before the device reads or after it writes (flush or invalidate the cache, or use coherent memory).

FAQ

Why does DMA reduce the CPU load?

A DMA controller moves the data itself, so the CPU only sets up the transfer and is notified when it is done.

Is DMA always faster?

No. For tiny transfers the setup cost can outweigh the benefit, and programmed I/O can be faster.

What is a DMA descriptor ring?

A ring of descriptors in memory, each describing a buffer. The device and the driver pass buffers back and forth through it, as in network cards and NVMe drives.

Why does cache coherency matter with DMA?

The device reads and writes memory directly, so the CPU cache may hold stale data. Software must flush or invalidate the cache, or use coherent memory.

Check your understanding

Which statement is correct about DMA using a ring of descriptors in memory, as widely used by network cards and NVMe SSDs?

  1. AThe CPU transfers data by writing it byte by byte into device registers
  2. BThe CPU only writes addresses and lengths into descriptors and notifies the device, which reads them and carries out the transfers itself
  3. CDescriptors exist only inside the device and are invisible to the CPU
Show answer and explanation

Answer: B. The CPU only writes addresses and lengths into descriptors and notifies the device, which reads them and carries out the transfers itself

A descriptor ring is a table in main memory, used in a circular way, where each entry says which address to transfer and how many bytes. The CPU fills free descriptors and tells the device once, through a register, how far it has written. The device reads the descriptors by DMA, transfers the data and marks finished descriptors as complete. CPU and device can advance many transfers without waiting for each other.

When a microcontroller captures many A/D conversion results at regular intervals, what is the advantage of using DMA?

  1. AThe A/D converter's resolution increases automatically
  2. BThe input voltage is amplified automatically
  3. CThe CPU need not read each result in an interrupt; DMA stores them in memory, reducing CPU load
Show answer and explanation

Answer: C. The CPU need not read each result in an interrupt; DMA stores them in memory, reducing CPU load

If the CPU reads each conversion in an interrupt, at tens of thousands of samples per second the interrupt overhead alone consumes much of its time. With DMA, each completed conversion is written in turn into an array in memory, and the CPU is notified only when the array is full. Combined with a timer that triggers conversions, precisely spaced sampling continues without the CPU.

In a system where hardware does not keep caches coherent, what must software do before the CPU reads data a device wrote to main memory via DMA?

  1. ATemporarily lower the CPU clock frequency
  2. BInvalidate the cache for that range so the data is reread from main memory
  3. CWrite the whole cache back to main memory and then discard the data the DMA delivered
Show answer and explanation

Answer: B. Invalidate the cache for that range so the data is reread from main memory

DMA transfers data between devices and main memory without the CPU, so on non-coherent systems the CPU's cache may still hold stale data for that range. Reading it directly would return old values rather than the newly arrived data. The driver therefore invalidates that range of the cache before reading so fresh values come from memory. Conversely, data to be sent to a device is written back from the cache before the DMA starts.

  1. What is the main role of an IOMMU?

Practice I/O Interfaces & Buses questions

Key terms explained

DMA (direct memory access)
A mechanism that transfers data directly between peripherals and memory without going through the CPU, so the CPU can do other work during large transfers.
Interrupt
A CPU mechanism that temporarily suspends the current task to handle a request, for example from an external device, and then returns to the original task.

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