What is Noise margin?

The difference between the voltage level an output guarantees and the level an input is guaranteed to interpret correctly. The low-level margin is VIL(max) − VOL(max) and the high-level margin is VOH(min) − VIH(min); noise smaller than this causes no misreading.

Japanese name: ノイズマージン

Noise margin appears in 3 practice questions across 3 topics, including SRAM and flash memory, How to read datasheets, I/O Interfaces & Buses.

Logic levels and noise margins H output L output Read as H Undefined Read as L VDD 0 V VOH(min) VOL(max) VIH(min) VIL(max) NMH NML Output guarantees Input thresholds NMH = VOH(min) − VIH(min) NML = VIL(max) − VOL(max)
Logic levels and noise margins · View in diagrams

Field: How to read datasheets

Try it: questions about Noise margin

Which correctly describes the static noise margin (SNM) that represents the stability of an SRAM cell?

  1. AThe amount of noise voltage the cell can withstand without flipping its stored state, obtained from the butterfly curve
  2. BThe current consumption of the cell
  3. CThe time taken to read the cell
Show answer and explanation

Answer: A. The amount of noise voltage the cell can withstand without flipping its stored state, obtained from the butterfly curve

SNM is the side of the largest square that fits inside the butterfly curve formed by overlaying the transfer characteristics of a cell's two inverters; larger means more noise-tolerant. Read SNM, with the access transistor on, is smaller than hold SNM and is the binding stability constraint. It shrinks with lower supply voltage or greater variation, making it a key metric in low-voltage design.

The driving IC has VOH(min) = 2.9 V and VOL(max) = 0.4 V, and the receiving IC has VIH(min) = 2.0 V and VIL(max) = 0.8 V. What is the low-level noise margin?

  1. A0.9 V
  2. B0.4 V
  3. C0.8 V
Show answer and explanation

Answer: B. 0.4 V

The low-level noise margin is VIL(max) − VOL(max) = 0.8 − 0.4 = 0.4 V. The output drives an L of 0.4 V or less even in the worst case, and the input recognizes up to 0.8 V as L, so noise up to the 0.4 V difference will not cause a misread. The high-level noise margin is VOH(min) − VIH(min) = 2.9 − 2.0 = 0.9 V. Noise margin is thus found by combining the guaranteed values of the driver and receiver, and the smaller one is the weak point of that connection. 0.8 V is VIL(max) itself.

Noise margin in the explanations

Questions that mention Noise margin (3)

  1. Which correctly describes the static noise margin (SNM) that represents the stability of an SRAM cell?
  2. The driving IC has VOH(min) = 2.9 V and VOL(max) = 0.4 V, and the receiving IC has VIH(min) = 2.0 V and VIL(max) = 0.8 V. What is the low-level noise margin?
  3. Why does forward error correction (FEC) become more important with PAM4 than with NRZ?

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