I/O Interfaces & Buses

How does communication in PCI Express work?

  1. AAddresses and data are driven simultaneously on many separate wires
  2. BRead and write requests are sent as packets and handled in three layers: transaction, data link and physical
  3. CThe CPU directly controls every bit of every transfer
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Answer: B. Read and write requests are sent as packets and handled in three layers: transaction, data link and physical

PCI Express sends memory reads and writes and configuration requests as packets (TLPs) with headers and data. The transaction layer forms packets, the data link layer adds error-detecting codes and confirms delivery, and the physical layer encodes them and sends them through the SerDes. To software it still looks like reading and writing memory addresses, as with old PCI, which preserves compatibility.

  • A. That is how a parallel bus works.
  • B. Correct. It has a layered structure like a network.
  • C. The CPU does not handle individual bits.
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More I/O Interfaces & Buses questions

  1. What does the PCI Express data link layer do about bit errors during transmission?
  2. How are the registers and memory of a PCI Express device made accessible to the CPU?
  3. What is a characteristic of MSI (message-signaled interrupts) used in PCI Express?
  4. What is the difference between bandwidth and latency in interface performance?
  5. On a link with 10 GB/s bandwidth and 1 µs latency, roughly how long does it take to send 64 bytes once (time = latency + size ÷ bandwidth)?