Damascene vs Subtractive Etch Interconnects: Key Differences
Subtractive etch interconnects are formed by depositing a metal film over the whole surface, removing the unwanted parts by dry etching through a resist pattern, and filling the gaps between the remaining lines with dielectric; this method was long used for aluminum wiring. The damascene process works in the opposite order: trenches are first etched into the dielectric, metal is filled in, and the excess metal is removed by CMP. Copper hardly forms volatile compounds and is difficult to dry etch, so damascene became the standard for copper wiring. For the finest wires, forming ruthenium or other metals by etching is also being studied.
| Aspect | Damascene process | Subtractive etch interconnect |
|---|---|---|
| Process order | Deposit dielectric → etch trenches and via holes → barrier metal and seed layer → copper plating → remove excess by CMP | Deposit metal film → lithography → dry etch the metal → fill between lines with dielectric and planarize |
| What is etched | Dielectric | Metal film |
| Main metal | Copper (Cu) | Aluminum (Al-Cu alloy). Ruthenium and others are also being studied for the finest wires |
| Metal fill | Trenches are filled by electroplating. Filling narrow trenches without gaps (voids) is a challenge | Only a flat film made by sputtering or a similar method is needed |
| Dielectric fill | The dielectric is deposited flat first, so it is rarely a problem | Narrow gaps between lines must be filled with dielectric without voids (HDP-CVD and similar methods have been used) |
| CMP | Essential. Removes the copper and barrier metal outside the trenches, separating each line | Not used to pattern the metal. Used to planarize the dielectric |
| Barrier layer | Trench bottoms and sidewalls are lined with TaN/Ta or similar to prevent copper diffusion. In narrow lines it takes up a larger share of the cross section | Diffusion is less of a problem with aluminum; Ti/TiN or similar films are stacked above and below |
| How vias are made | In dual damascene, line trenches and vias are filled at the same time and finished with a single CMP | Vias are opened in a separate step, filled with tungsten or similar and planarized by CMP before the next wiring layer is made |
| Challenges for fine wires | As lines narrow, copper resistivity rises (size effect) and the barrier layer takes a larger share | Precision in etching thin metal lines, and filling between lines with dielectric, are challenges |
Figures are typical orders of magnitude and vary by process generation and product.