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STI vs LOCOS Isolation: Key Differences Explained

Both are device isolation methods that electrically separate neighboring transistors with thick oxide. LOCOS thermally oxidizes the silicon not covered by a nitride film to grow thick oxide. The process is simple, but oxide encroaches under the edge of the nitride to form a bird's beak, so the isolation width cannot be made narrow. STI etches shallow trenches into the silicon, fills them with oxide and planarizes with CMP. It has no bird's beak and gives a flat surface, so from around the 0.25 µm generation it became the standard for scaled LSIs.

AspectSTI (shallow trench isolation)LOCOS (local oxidation of silicon)
Isolation methodEtch shallow trenches in the silicon and fill them with oxideThermally oxidize the silicon not covered by nitride to grow a thick field oxide
Main process stepsPad oxide and nitride deposition → lithography → silicon dry etch → liner oxidation → oxide fill (HDP-CVD, etc.) → CMP → nitride removalPad oxide and nitride deposition → lithography → nitride etch → thermal oxidation (such as wet oxidation at about 1,000 °C) → nitride removal
Isolation dimensions (typical)Trench depth of about several hundred nm. Trench width can be as narrow as the minimum feature sizeField oxide thickness of about several hundred nm to 1 µm. The isolation width is hard to narrow
Bird's beakNonePresent. Oxide encroaches under the nitride edge, reducing the effective device width
Surface planarityFlat after CMP. An advantage for lithography depth of focusPart of the oxide rises above the silicon surface, leaving a step
Suitability for scalingHigh. The isolation width can be narrowed, raising device densityLow. The narrower the isolation, the larger the share taken by the bird's beak, making sub-µm isolation difficult
Main issuesTrench fill defects (voids), CMP dishing, trench-corner shape (divots), stress from the filled oxideBird's beak, gate-oxide defects caused by nitride formed under the nitride film (Kooi effect), long high-temperature steps
Number of steps and costMany. Requires etch, fill and CMP toolsFew. Centered on thermal oxidation and inexpensive
Generations used (typical)From around the 0.25 µm generation to the present. Also used to isolate fins from each other in FinFETsUp to around the 0.35 to 0.5 µm generations of the 1990s. Still remains in some older-generation processes and in power and analog processes

Figures are typical orders of magnitude and vary by process generation and product.

When to use which

STI
When you want to pack devices at high density, as in scaled logic and memory. When you want to narrow the isolation width to the minimum feature size and do subsequent lithography on a flat surface.
LOCOS
In older-generation processes with relaxed dimensions, when you want a simple process and low cost.
Transition
Improvements were made to shrink the LOCOS bird's beak, but they had limits, and LOCOS was replaced by STI as scaling progressed and CMP became practical.

FAQ

What is a bird's beak?

During LOCOS thermal oxidation, oxygen also diffuses sideways under the edge of the nitride film, and the oxide encroaches into the device area in a shape like a bird's beak. Because it makes the width available for transistors narrower than designed, it became a major obstacle to scaling.

Why does STI need CMP?

When oxide is filled into the trenches, a thick layer of oxide also builds up on the nitride outside the trenches. CMP removes it, using the nitride as the polish-stop layer, leaving oxide only in the trenches and making the surface flat.

How deep are STI trenches?

It depends on the generation, but several hundred nm is typical. Insulator of sufficient depth is placed so that leakage current does not flow to neighboring devices and parasitic transistors do not turn on.

Is LOCOS no longer used?

It has been replaced by STI in scaled logic and memory, but in older-generation processes with relaxed dimensions it is sometimes still used because it has fewer steps and is cheaper.

Check your understanding

Which method is mainly used for device isolation in scaled ICs?

  1. AWire bonding
  2. BLOCOS (local oxidation)
  3. CSTI (shallow trench isolation)
Show answer and explanation

Answer: C. STI (shallow trench isolation)

Modern ICs mainly use shallow trench isolation (STI): trenches about 200–300 nm deep are etched into silicon, filled with CVD oxide and planarized by CMP. The earlier LOCOS approach suffered lateral bird's-beak encroachment that prevented narrow isolation and left surface steps, so STI replaced it around the 0.25 µm generation. STI is flat, allows narrow spacing and also isolates FinFET fins.

In LOCOS (local oxidation), what is the phenomenon called in which oxide encroaches like a bird's beak under the edge of the nitride mask?

  1. ADishing
  2. BNotching
  3. CBird's beak
Show answer and explanation

Answer: C. Bird's beak

In LOCOS, nitride-covered areas resist oxidation, but oxidant diffuses laterally through the pad oxide beneath the nitride edge, so oxide encroaches in a bird's-beak shape. The encroachment can reach about half the oxide thickness on each side, eating into active area, so STI replaced LOCOS around the 0.25 µm generation. The pad oxide is needed to protect silicon from the nitride's stress.

Which generally describes the thickness relationship between the field oxide used for isolation such as LOCOS and the gate oxide of a MOSFET?

  1. AThe gate oxide is much thicker
  2. BBoth have the same thickness
  3. CThe field oxide is much thicker
Show answer and explanation

Answer: C. The field oxide is much thicker

Field oxide is made thick—hundreds of nm—so that wiring crossing over it cannot turn on parasitic transistors; thicker oxide raises their threshold voltage. Gate oxide, by contrast, is only a few nm thick to couple the gate field strongly into the channel—a difference of more than 100×. Chips may also use thicker gate oxides for I/O transistors alongside thin core oxides.

  1. In LOCOS, what is the phenomenon called in which a thin nitride forms on the silicon surface under the nitride mask, later causing the gate oxide there to be locally thin or defective?
  2. Which abrasive particles are often used in STI CMP to achieve high polishing selectivity of oxide to silicon nitride?
  3. Which combination correctly lists processes in which CMP is used?

Practice Oxidation and diffusion questions

Key terms explained

STI (shallow trench isolation)
Isolating devices by etching shallow trenches in silicon, filling them with insulator and planarizing by CMP. It has no bird's beak like LOCOS and is the standard isolation for fine-pitch ICs.
LOCOS
A method that isolates devices by thickly oxidizing only areas not covered by nitride. It forms a beak-like encroachment at the edges (the bird's beak) and has been replaced by STI.
Bird's beak
In LOCOS, the beak-shaped encroachment of oxide under the edge of the nitride mask. Because it wastes active area, it led to the switch to STI at finer geometries.
CMP
Chemical mechanical polishing. Planarizes the wafer surface by combining the chemical action of a slurry with mechanical polishing by a pad.
Thermal oxidation
A method of forming an SiO2 film on silicon by heating it in oxygen or water vapor. There are dry and wet oxidation.

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