What is False path?

A path that exists structurally but along which no signal actually propagates in operation. It is excluded from STA as a timing exception, specified with set_false_path in SDC.

Japanese name: フォールスパス

False path appears in 2 practice questions across 1 topic, including Timing analysis and CDC.

Field: Timing analysis and CDC

Try it: questions about False path

For which path is it appropriate to set a false path (set_false_path)?

  1. AA path that is structurally connected but along which no signal can actually propagate, for example because the select conditions are mutually exclusive
  2. BA path with a large timing violation that is hard to fix
  3. CA path that only needs to capture data once every two cycles
Show answer and explanation

Answer: A. A path that is structurally connected but along which no signal can actually propagate, for example because the select conditions are mutually exclusive

STA examines every connected path without considering what the logic means. As a result, violations can be reported even on paths that are never actually exercised, such as in a circuit where two multiplexers driven by the same select signal choose opposite inputs. Such paths are designated false paths and excluded from analysis. Excluding a path just because it is hard to fix hides real bugs. A path that captures once every two cycles should stay in the analysis as a multicycle path with extended time.

Why can it be a problem to leave the paths that carry an asynchronous FIFO's Gray code pointers to the other domain unconstrained (false path) just because they are asynchronous?

  1. ABecause setting a false path causes the synchronizer flip-flops to be removed by logic synthesis
  2. BBecause if the delay difference between bits exceeds the pointer update interval, the assumption that only one bit changes at a time breaks down on the receiving side
  3. CBecause setting a false path causes the tool to convert the pointer back to binary
Show answer and explanation

Answer: B. Because if the delay difference between bits exceeds the pointer update interval, the assumption that only one bit changes at a time breaks down on the receiving side

Gray code pointers assume that, at whichever receiving edge they are sampled, no more than one bit is changing. If the paths are left unconstrained, place and route can produce widely varying delays between bits. For example, with a 2 ns sending period, if the bit that changes first takes 3 ns to arrive and the bit that changes second takes 1 ns, both arrive at time 3 ns, so it looks as if two bits changed simultaneously. Therefore a maximum delay constraint is applied to keep the delay difference within one sending-clock period.

Questions that mention False path (2)

  1. For which path is it appropriate to set a false path (set_false_path)?
  2. Why can it be a problem to leave the paths that carry an asynchronous FIFO's Gray code pointers to the other domain unconstrained (false path) just because they are asynchronous?

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Related terms

STA (static timing analysis) Multicycle path Asynchronous FIFO Gray code Place and route Clock domain Clock uncertainty Critical path CRPR (clock reconvergence pessimism removal) Handshake

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