Advanced packaging (3D and chiplets)

What is the main reason for setting a keep-out zone around TSVs where no transistors are placed?

  1. ABecause TSVs emit light
  2. BBecause stress from the difference in thermal expansion between copper and silicon changes the characteristics of nearby transistors
  3. CBecause the area around TSVs cannot be exposed
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Answer: B. Because stress from the difference in thermal expansion between copper and silicon changes the characteristics of nearby transistors

Copper has a larger coefficient of thermal expansion than silicon, so temperature changes during manufacturing leave stress in the silicon around TSVs. Stress alters carrier mobility, shifting characteristics such as the current of nearby transistors. A keep-out zone of a set distance is therefore drawn around each TSV, and sensitive devices are not placed there.

  • A. TSVs do not emit light.
  • B. Correct. Stress from the expansion mismatch changes characteristics.
  • C. The area around TSVs can be exposed.
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More Advanced packaging (3D and chiplets) questions

  1. Which correctly describes chiplets?
  2. Which correctly describes a TSV (through-silicon via)?
  3. Which correctly describes HBM (High Bandwidth Memory)?
  4. Which correctly describes the role of the silicon interposer used in 2.5D packaging?
  5. Which correctly describes hybrid bonding?