Advanced packaging (3D and chiplets)

In 2.5D packaging, what is the main advantage of using an interposer made of redistribution layers (RDL) of organic dielectric and copper wiring instead of a silicon interposer?

  1. AIt can always form finer wiring than silicon
  2. BTSVs become unnecessary and no heat dissipation is needed at all
  3. CIt keeps cost down more easily and makes large-area interposers easier to build
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Answer: C. It keeps cost down more easily and makes large-area interposers easier to build

Organic RDL interposers do not use silicon wafer processing, so they keep cost down more easily, and they are flexible and easier to make large. On the other hand, their wiring fineness and density often fall short of silicon interposers, so they are chosen by application or combined with silicon bridges.

  • A. Silicon interposers often have the finer wiring.
  • B. Heat dissipation does not become unnecessary.
  • C. Correct. Low cost and easy scaling up are the advantages.
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More Advanced packaging (3D and chiplets) questions

  1. Through the HBM3 generation, which is the data bus width per HBM stack?
  2. When a TSV wafer is thinned to tens of micrometers and processed, which technique temporarily attaches it to a support wafer (carrier) to prevent cracking and warpage?
  3. In fan-out wafer-level packaging, what is the wafer-like form called that is rebuilt by placing diced chips with spacing on a support and embedding them in resin?
  4. Which is a challenge of moving to chiplets?
  5. What is the main aim of products that stack a cache SRAM chip on top of a processor chip with hybrid bonding?