Advanced packaging (3D and chiplets)

Which TSMC 2.5D packaging technology is widely used to place AI GPUs and HBM side by side on a silicon interposer and connect them?

  1. AInFO
  2. BEMIB
  3. CCoWoS
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Answer: C. CoWoS

CoWoS (Chip on Wafer on Substrate) is a 2.5D packaging technology that mounts chips on a wafer-form interposer (chip on wafer) and then mounts that on a package substrate (on substrate). It is widely used to connect AI GPUs with HBM, and expanding its capacity became a major challenge as AI demand surged.

  • A. InFO is TSMC's fan-out wafer-level packaging.
  • B. EMIB is Intel's silicon bridge technology.
  • C. Correct. It is the 2.5D packaging widely used to connect GPUs and HBM.
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More Advanced packaging (3D and chiplets) questions

  1. Which TSMC fan-out wafer-level packaging technology became widely known when it was adopted for a smartphone processor in 2016?
  2. Which is a challenge of wafer-on-wafer (W2W) bonding, which bonds entire wafers together?
  3. In 2.5D packaging, what is the main advantage of using an interposer made of redistribution layers (RDL) of organic dielectric and copper wiring instead of a silicon interposer?
  4. Through the HBM3 generation, which is the data bus width per HBM stack?
  5. When a TSV wafer is thinned to tens of micrometers and processed, which technique temporarily attaches it to a support wafer (carrier) to prevent cracking and warpage?