Advanced packaging (3D and chiplets)

In AI GPUs, what is the main reason the GPU chip and HBM are placed side by side on one silicon interposer?

  1. ATo increase part count
  2. BTo connect the chips over short distances with an extremely large number of wires, achieving very high memory bandwidth
  3. CTo reduce memory capacity
Show answer and explanation

Answer: B. To connect the chips over short distances with an extremely large number of wires, achieving very high memory bandwidth

HBM has more than 1,000 data lines, too many to route on an ordinary package substrate. Placing the GPU and HBM side by side on a silicon interposer, where fine wiring can be made, connects them over short distances with many wires, achieving the very high memory bandwidth AI computation needs.

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More Advanced packaging (3D and chiplets) questions

  1. In 3D NAND, which is a correct advantage of making the memory cell array and peripheral circuits on separate wafers and bonding them together?
  2. What is the material called that is placed between a chip and a heat spreader to fill microscopic gaps and improve heat transfer?
  3. What is the data transfer capacity that can be secured per unit length of chip edge called, emphasized as a performance metric for chiplet interconnects?
  4. Which correctly describes the difference between 2.5D and 3D packaging?
  5. In HBM, what is the typical number of DRAM dies stacked in one stack?