SRAM and flash memory
In 3D NAND, what is the main advantage of placing peripheral circuits such as sense amplifiers beneath the memory array (CMOS under Array and similar)?
- AIt makes erasing unnecessary
- BIt reduces chip area, increasing the capacity obtained from one wafer
- CIt reduces the number of stacked layers
Show answer and explanation
Answer: B. It reduces chip area, increasing the capacity obtained from one wafer
Peripheral circuits used to sit beside the cell array, but placing them directly underneath reduces chip area accordingly. This increases bit density and lowers cost. Because the array is built on top after the peripheral circuits, care is needed with the thermal budget and similar factors.
- A. Erasing is still required regardless of the structure.
- B. Correct. Placing peripherals under the array reduces area.
- C. It is not directly related to the number of layers.