SLC vs MLC vs TLC vs QLC NAND: Differences Explained

The name tells you how many bits one NAND flash cell stores: one (SLC), two (MLC), three (TLC) or four (QLC). Storing more bits per cell packs more capacity into the same silicon and lowers the cost per bit, but the cell must distinguish more voltage levels that sit closer together. So endurance, speed and reliability all get worse as you go from SLC to QLC.

AspectSLCMLCTLCQLC
Bits per cell1234
Threshold voltage states24816
Endurance (program/erase cycles)About 50,000 to 100,000Several thousand to 10,000A few thousandAbout 1,000
Write speedFastestFastSlowerSlowest
Read latencyLowestLowHigherHighest
Error rate and ECCLowest, light error correctionLowHigher, stronger ECC neededHighest, the strongest ECC and read-retry needed
Cost per bitHighestHighLowLowest
Capacity for the same die areaLowestTwice SLCThree times SLCFour times SLC
Typical usesIndustrial and aerospace storage, enterprise write cachesOlder enterprise and high-end consumer SSDsMainstream consumer SSDs, phones, memory cardsLarge, low-cost drives and read-heavy storage

Figures are typical orders of magnitude and vary by process generation and product.

When to use which

SLC
When endurance and reliability matter more than price: industrial systems, logging, and the fast cache area of other SSDs.
TLC
The mainstream choice today, balancing cost, speed and endurance for PCs and phones.
QLC
When capacity per dollar matters and the workload is mostly reading: bulk storage, game libraries, archives.
Mixed
Many TLC and QLC SSDs use part of the space as a fast SLC-mode cache to absorb bursts of writes. When that cache is full, write speed drops.

FAQ

Which is better, TLC or QLC?

TLC is faster and has higher endurance, so it is the mainstream choice. QLC is cheaper per gigabyte and suits read-heavy storage, but it wears out faster.

Why does endurance drop as bits per cell increase?

More bits per cell means more threshold voltage levels packed closer together, so the widening of those levels caused by wear leads to read errors sooner.

What is an SLC cache?

Many TLC and QLC SSDs use part of their space in fast SLC mode to absorb bursts of writes. When that cache is full, the write speed drops.

How many voltage levels must QLC distinguish?

Sixteen, compared with 2 for SLC, 4 for MLC and 8 for TLC.

Check your understanding

How many bits does an SLC (single-level cell) flash memory store per cell?

  1. A2 bits
  2. B4 bits
  3. C1 bit
Show answer and explanation

Answer: C. 1 bit

SLC stores one bit (two states) per cell. Because states are easy to distinguish, it programs fast, endures about 100,000 cycles and handles retention and heat well, but offers the least capacity for a given number of cells. It is therefore used in industrial and automotive applications demanding high reliability. MLC stores 2 bits, TLC 3 and QLC 4.

Which orders SLC, MLC and TLC from the most rewrite cycles to the fewest?

  1. ATLC > MLC > SLC
  2. BSLC > MLC > TLC
  3. CMLC > SLC > TLC
Show answer and explanation

Answer: B. SLC > MLC > TLC

Fewer bits per cell mean wider gaps between threshold states, so cells still read correctly as wear broadens the distributions, giving higher endurance. Generally SLC > MLC > TLC > QLC, roughly 100,000 cycles for SLC, several thousand to 10,000 for MLC, a few thousand for TLC and about 1,000 for QLC. SLC mode is used in industrial products needing high endurance and in SSD cache areas.

In QLC (4 bits per cell) NAND flash, how many threshold voltage states must one cell distinguish?

  1. A4
  2. B8
  3. C16
Show answer and explanation

Answer: C. 16

Storing N bits per cell requires distinguishing 2ᴺ threshold-voltage states—2⁴ = 16 for QLC. The usable voltage window (a few volts) is about the same, so the spacing between states is a small fraction of SLC's, demanding much finer programming control. QLC therefore writes slowly and endures less but is cheaper per gigabyte, used in read-heavy data-center and high-capacity SSDs.

  1. In TLC and QLC SSDs, what is the main purpose of using part of the space as SLC to absorb writes temporarily?
  2. Which is closest to the typical endurance (number of rewrite cycles) of SLC NAND flash memory?
  3. In multi-level (MLC or TLC) NAND flash, why are the bit patterns assigned to adjacent threshold-voltage states chosen to differ by only one bit?

Practice SRAM and flash memory questions

Key terms explained

SLC (single-level cell)
A flash format that stores one bit per cell. With only two threshold-voltage states it is faster and more durable than multi-level formats.
TLC (triple-level cell)
A flash format that stores three bits per cell, distinguishing eight threshold-voltage states. It lowers cost per bit but reduces endurance. Four bits per cell is QLC.
NAND flash memory
Non-volatile memory in which memory cells are connected in series. It is dense and easy to scale to large capacities, and is used in SSDs and memory cards.
3D NAND
NAND flash in which memory cells are stacked vertically in many layers to increase capacity. It was introduced to get past the limits of planar scaling, and layer counts now exceed 200.

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