What Is a Logic Gate? AND, OR, NOT and How Gates Compute
A logic gate is a small circuit that takes inputs of 0 or 1 and gives out 0 or 1 by a fixed rule. Examples are AND ("1 only if both are 1"), OR ("1 if either is 1") and NOT ("flip it"). Each one is built from a few to a dozen or so transistors. Combine gates, and you can add numbers and run the complex calculations of a CPU.
What you'll learn
- What a logic gate does, and the rules of six gates (NOT, AND, OR, NAND, NOR, XOR)
- How switches in series and in parallel relate to AND and OR
- How four transistors make a NAND gate
- Why NAND alone can build any circuit, and why gate delay limits clock speed
Prerequisites: it helps to know two things. A transistor is a switch flipped by electricity. A computer treats high and low voltage as 1 and 0.
In everyday life
A microwave oven starts heating only when the door is closed and the start button is pressed. A car turns on a warning light if even one door is open. A staircase light can be switched on or off from either the top or the bottom switch.
All three follow a rule that decides "act or not" from a few conditions. The first needs both conditions. The second needs just one. The third asks whether the two switches point the same way. A logic gate is a small circuit that computes rules like these with 0s and 1s.
Many real microwaves and cars hand such decisions to a microcontroller, a small computer on a chip. Inside that microcontroller, too, is a large collection of logic gates.
A logic gate is a circuit that follows a 0-and-1 rule
In computer circuits, a high voltage stands for 1 and a low voltage stands for 0. A logic gate takes 0 or 1 at its inputs and gives 0 or 1 at its output. Some gates have one input; others have two or more. Which output goes with which inputs is fixed for each type of gate and never changes.
A gate's rule is clearest when written as a table. A table that lists every combination of inputs, with the output for each, is called a truth table. With two inputs there are four combinations (00, 01, 10 and 11), so four rows are enough.
Note that "gate" here means one unit of a circuit that processes 0s and 1s. One of a transistor's terminals (the points where current enters or leaves) is also called a "gate." That is a different meaning.
The basic three: NOT, AND, OR
NOT: flip it
A NOT gate has just one input. It gives 1 for a 0 and 0 for a 1. Because it flips its input, it is also called an inverter.
| Input A | NOT output |
|---|---|
| 0 | 1 |
| 1 | 0 |
AND: 1 only when both are 1
An AND gate gives 1 only when both inputs are 1. If even one input is 0, the output is 0. This matches the microwave's check: "the door is closed" and "the button is pressed."
OR: 1 if either is 1
An OR gate gives 1 if either input is 1. Only when both inputs are 0 is the output 0. This matches the car's rule: "warn if even one door is open."
| A | B | AND | OR |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 |
AND and OR gates do not have to have two inputs. A 3-input AND gives 1 only when all three inputs are 1.
The inverted relatives, and XOR
An AND whose output is flipped by a NOT is called NAND, short for "Not AND." In the same way, an inverted OR is a NOR. NAND gives "0 only when both are 1." NOR gives "1 only when both are 0."
Another common gate is XOR ("ex-or"). It gives 1 when the two inputs differ, that is, when only one of them is 1. A staircase light uses the same property as XOR. Flipping either switch changes the two switches between "same" and "different." So the light goes on or off.
| A | B | NAND | NOR | XOR |
|---|---|---|---|---|
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 0 |
The NAND column is the AND column from before, with every 0 and 1 swapped. The NOR column is the OR column swapped in the same way.
Thinking in switches: series and parallel
AND and OR are easier to picture with a circuit of a battery, a light bulb and switches. Two switches connected one after the other in a single line are in series. Two switches placed on two separate paths are in parallel. In the figure below, read a switch that is on as 1, and a lit bulb as 1.
In series, electricity must pass through both A and B to reach the bulb. So the bulb lights only when both are on. This is the same as the AND truth table. In parallel, electricity can take either path, so turning on either switch lights the bulb. This is the same as OR.
Switch circuits and calculations with 0s and 1s match each other. In the 1930s, Claude Shannon set this out in a thesis; he later founded information theory. He showed that relay circuits could be described with equations and designed that way. (A relay is a switch moved by an electromagnet, used in telephone exchanges at the time.)
Building gates from transistors
The gates inside a chip are built from transistors called MOSFETs. A MOSFET is a switch: the voltage on its gate terminal opens or closes a path for current. "What Is a Transistor?" explains how this works.
MOSFETs come in two kinds that act in opposite ways. An nMOS connects when its input is 1, and a pMOS connects when its input is 0. Building gates by pairing the two kinds is called CMOS, and almost every chip today uses it. The simplest gate, NOT, needs just two transistors: one pMOS and one nMOS.
A NAND gate uses four transistors
A 2-input NAND gate has two pMOS and two nMOS, four transistors in all. On the positive supply side, which pulls the output to 1, two pMOS sit in parallel. On the 0 V side, which pulls the output to 0, two nMOS sit in series.
When A and B are both 1, both nMOS in series connect. The output joins the 0 V side and becomes 0. At this moment, both pMOS are off.
When either A or B is 0, one of the nMOS in series is off, so there is no path to the 0 V side. Instead, the pMOS that receives the 0 connects. The output joins the positive supply and becomes 1. This gives the NAND rule: "0 only when both are 1."
For any input, either the upper path or the lower path is always off. No current keeps flowing from the supply to the 0 V side. So the gate uses almost no power while it holds its output. This is a strength of CMOS.
AND takes more work than NAND
In CMOS, an input of 1 turns on an nMOS, which pulls the output down toward 0 V. So a single layer of pMOS above and nMOS below can only build gates whose output heads toward 0 when an input becomes 1. NOT, NAND and NOR have this form. AND is usually built as a NAND followed by a NOT, using 4 + 2 = 6 transistors. OR is built the same way, as a NOR followed by a NOT.
NAND alone can build any circuit
NAND gates have an interesting property. With enough NAND gates alone, you can build NOT, AND, OR and a circuit for any rule at all. A gate with this property is called a universal gate.
First, here is how to make NOT. Feed the same signal A into both inputs of a NAND. In the truth table, the "0 and 0" row gives 1, and the "1 and 1" row gives 0. The output is the opposite of A, so the gate works as a NOT.
Next comes AND. A NAND is "an inverted AND," so inverting its output again brings back AND. For that inversion, use the NAND-based NOT just built. Two NAND gates give you an AND.
To make OR, invert A and B with NOTs first, then feed them into a NAND. If A and B are both 0, the inverted inputs are both 1, so the NAND outputs 0. In every other case, at least one inverted input is 0, and the output is 1. That is exactly the OR rule: "0 only when both are 0." The rule that "combining inversions lets you swap AND and OR" is called De Morgan's theorem. Once you can build NOT, AND and OR, you can build a circuit for any truth table.
The same holds for NOR gates. The guidance computer of the Apollo spacecraft, which landed on the Moon in 1969, made use of this. It used about 2,800 ICs (integrated circuits). Almost all were one type: an IC holding two 3-input NOR gates. ICs were new then, with little track record. The computer had to be highly reliable. So its makers chose one simple type, which made reliability easier to confirm.
That said, today's chips are not built from NAND alone. Using only NAND needs more parts for the same job, and tends to be slower. Real designs mix NAND, NOR and NOT with parts that merge common combinations into one, chosen to fit each purpose.
Combining gates to compute
Connect a gate's output to the next gate's input, and you can build more complex rules. For example, adding two 1-digit binary numbers takes just one XOR and one AND side by side. The XOR gives "the answer for that digit," and the AND gives "the carry to the next digit." This circuit is called a half adder.
"How Do Computers Use Binary?" explains how to extend the half adder to add numbers of any length. In the logic circuit simulator, you can place gates, flip switches and build a truth table to check. You can also load an example of an XOR built only from NAND gates.
In a circuit like the adder, the output depends only on the inputs at that moment. Such a circuit is called a combinational circuit. On the other hand, feeding a gate's output back to its own inputs lets you build circuits that remember a past state. These are called sequential circuits. A CPU uses them to hold numbers partway through a calculation. The table in "Combinational vs Sequential Logic" compares the two.
Gates have a delay
When a gate's input changes, the output does not change at that same instant. It takes a little time for the transistors to switch and to charge the next gate's input. The time from an input change to the output change is called propagation delay.
For example, look at the datasheet for the 74HC00, an IC sold as a part with NAND gates in it. At a 4.5 V supply, under the stated test conditions, the typical delay is 9 nanoseconds (a nanosecond is a billionth of a second). Gates inside a chip are far smaller, and the gates they drive are close by. So their delays are measured in picoseconds (trillionths of a second).
A CPU moves its work forward one step at a time, in time with a steady signal called the clock. During each clock cycle, signals pass through many gates in turn. The answer must settle before the next tick. So the path with the most gates and the longest delay decides how fast the clock can go. This path is called the critical path.
Let's put in numbers. At a 3 GHz clock, each cycle lasts about 333 picoseconds. If we assume, for illustration, 10 picoseconds per gate, at most about 33 gates fit in a row. In practice, wire delay and the time for the circuits that store the answer must also be subtracted. "RC Time Constant Explained" covers how wire delay works.
Common misconceptions
Myth: A logic gate has tiny switches inside that move, like ones you flip by hand
In fact, it has no moving parts at all. The transistors in a gate connect or disconnect electrically, driven by the voltage from the gate before. People only flip things at the entry points, like a keyboard. Inside a chip, each gate's output flips the next gate, in a chain that runs billions of times per second. The myth tends to come from the switch analogy, or from old computers built with relays (switches that move metal contacts with an electromagnet).
Myth: 0 is exactly 0 V, and 1 is exactly 1 V (or the supply voltage)
In fact, 0 and 1 are each defined as a range of voltages. For the 74HC00 at a 4.5 V supply, an input at 1.35 V or below reads as 0. An input at 3.15 V or above reads as 1. Voltages in between may be read either way. The outputs, meanwhile, are guaranteed at 0.1 V or below for 0, and 4.4 V or above for 1 (at small output currents). So a 1 output, at 4.4 V or more, can drop by 1.25 V from noise. It is then still at 3.15 V or above, and still reads as 1. The 0 side has the same 1.25 V of room. This room is called the noise margin. Thanks to it, a little noise on a wire does not turn a 0 into a 1 or the reverse. Inside a chip, gates run at much lower voltages, but the idea of reading ranges is the same.
Myth: AND and OR are the basic parts, and NAND and NOR are more complex ones with extra parts added
In fact, in a CMOS chip it is the other way around. A 2-input NAND or NOR takes four transistors. AND and OR need two more for the inversion, six in all. The order you learn truth tables in (AND first, NAND after) differs from the order in which circuits are easiest to build.
By the numbers
| Item | Count |
|---|---|
| CMOS NOT gate | 2 transistors |
| CMOS 2-input NAND or NOR | 4 transistors |
| CMOS 2-input AND or OR | 6 transistors |
| One 74HC00 IC | 4 two-input NAND gates |
| Apollo Guidance Computer (1960s) | About 2,800 ICs (mostly two NOR gates each) |
| Intel 4004 (1971) | About 2,300 transistors |
| Apple A17 Pro (2023) | About 19 billion transistors |
Chip designers sometimes express circuit size as "how many 2-input NAND gates' worth." Simply dividing the A17 Pro's 19 billion transistors by NAND's four gives about 4.8 billion (a rough calculation by this site). But a real chip also has many parts that are not shaped like gates, such as memory circuits. Treat this number as a guide to scale only.
Learn more
- Try it yourself: the logic circuit simulator (connect gates and run them), and the Karnaugh map and logic simplifier (do the same job with fewer gates)
- Compare in a table: CMOS vs TTL (two ways to build gates), and nMOS vs pMOS
- Terms for the next step: multiplexer (a circuit that picks one input to pass through), flip-flop (a circuit that stores one bit), glitch (a brief wrong output caused by differing delays)
- See it in figures: the transistor layout of a NOT gate appears in the figure "CMOS inverter"
- Read on: "What Is a CPU?" explains how collections of gates carry out instructions