SRAM and flash memory
Which orders SLC, MLC and TLC from the most rewrite cycles to the fewest?
- ATLC > MLC > SLC
- BSLC > MLC > TLC
- CMLC > SLC > TLC
Show answer and explanation
Answer: B. SLC > MLC > TLC
The fewer bits stored per cell, the wider the spacing between threshold voltage states, so data can still be read correctly despite some degradation, and endurance is higher. Generally, the order is SLC > MLC > TLC > QLC. SLC is used where high endurance is needed.