A defect in which crystal planes shift and dislocations form under stress from temperature differences or the wafer's own weight during high-temperature processing of large wafers. It can cause problems such as overlay errors.
Field: Silicon wafers
At high temperature silicon weakens greatly, so stress from temperature gradients during rapid heating or cooling, or from the wafer's own weight at support points, can make crystal planes ({111}) slip, creating dislocations (slip).
What causes "slip", a problem when large-diameter wafers ar…Interstitial oxygen gathers around dislocations and pins them, so oxygen-containing CZ wafers resist slip and warpage during thermal processing better than low-oxygen FZ wafers.
Compared with FZ silicon, how does the interstitial oxygen …Yield Overlay Czochralski (CZ) method Crystal orientation DZ (denuded zone) FZ method (float zone) Gettering Ingot MCZ method (magnetic-field-applied CZ) Monitor wafer