Timing analysis and CDC
Which path between two clock domains requires a synchronizer?
- ABetween a 400 MHz clock generated by a PLL and the 200 MHz clock obtained by dividing it by two
- BBetween clocks obtained by distributing the same clock to two regions through the clock tree
- CBetween clocks generated from separate oscillators, with no defined frequency or phase relationship
Show answer and explanation
Answer: C. Between clocks generated from separate oscillators, with no defined frequency or phase relationship
Clocks generated from the same source with a defined frequency ratio and phase relationship are synchronous clocks, and once STA checks setup and hold, they can be treated like ordinary paths. Clocks from separate oscillators, even if both are labeled 100 MHz, actually differ slightly in frequency, so their edge alignment changes over time and a moment inevitably comes when setup or hold cannot be met. STA cannot guarantee paths between such asynchronous clocks, so a synchronizer is needed.