Interconnect processes
In manufacturing for backside power delivery, a wafer with transistors and wiring on its front is bonded to a carrier wafer, the original substrate is thinned from the back, and backside power wiring is then formed. What becomes especially difficult in this process?
- AThe number of front-side signal wiring layers increases, worsening routing congestion
- BBonding and thinning distort the wafer, making it hard to overlay backside patterns accurately on the front-side transistors
- CThe wiring path from the supply to the transistors becomes longer, increasing IR drop
Show answer and explanation
Answer: B. Bonding and thinning distort the wafer, making it hard to overlay backside patterns accurately on the front-side transistors
In backside power delivery, the wafer is flipped and bonded, thinned to between a few hundred nanometers and a few micrometers, and power is connected from the back right next to the transistors. Bonding distorts the wafer non-uniformly, so it becomes hard to align the backside exposure precisely to the front-side transistors and contacts. Simple errors such as overall expansion or rotation can be corrected by the exposure tool, but complex distortions that vary from place to place are hard to correct, and bonding methods and metrology are being improved. Moving power wiring to the back actually reduces front-side congestion and IR drop.
- A. Front-side power wiring disappears, so congestion is actually relieved.
- B. Correct. Overlay under bonding-induced distortion is the challenge.
- C. The power path becomes shorter and thicker, so IR drop decreases.