Advanced transistors (FinFET and GAA)

Which is considered to show the real degree of logic scaling better than the process generation (node) name?

  1. AThe wafer diameter
  2. BActual dimensions such as gate pitch (CPP) and minimum metal pitch
  3. CThe chip's selling price
Show answer and explanation

Answer: B. Actual dimensions such as gate pitch (CPP) and minimum metal pitch

Because recent generation names do not correspond directly to physical dimensions, actual density is compared using real dimensions such as the contacted poly pitch (gate pitch), minimum metal pitch and SRAM cell area.

Practice this topic Back to topic

More Advanced transistors (FinFET and GAA) questions

  1. Which devices are being researched with the aim of breaking the 60 mV/dec subthreshold swing barrier?
  2. In nanosheet GAA, what is the main role of the insulator (inner spacer) placed between the gate and the source/drain between the sheets?
  3. When standard cell height is expressed in the number of routing tracks, what is the effect of reducing the number of tracks?
  4. What is the purpose of using several types of transistors with different threshold voltages on the same chip?
  5. Which technique covers the gate with insulator so that a slightly misaligned contact does not short to the gate?