LSI design flow and EDA

Which technique describes properties a design must satisfy (for example, "respond within 3 cycles of a request") and has them checked automatically during simulation or by formal verification?

  1. AStealth dicing
  2. BAssertion-based verification
  3. CDummy fill
Show answer and explanation

Answer: B. Assertion-based verification

Assertions describe properties a circuit must always satisfy and temporal relationships between signals. Violations can be detected automatically during simulation or properties proven mathematically by formal verification, so bugs are found early and close to their source. They are written in languages such as SystemVerilog Assertions (SVA).

  • A. Stealth dicing is a method of separating chips.
  • B. Correct. Properties are described and checked automatically.
  • C. Dummy fill is non-functional patterning added for CMP.
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More LSI design flow and EDA questions

  1. In low-power design, which standard format describes the "power intent", such as power domains, power shutoff and level shifters, separately from the circuit description?
  2. What is the verification called that uses dedicated tools to check whether synchronizers are correctly inserted where signals pass between circuits running on different clocks?
  3. What is it called to reflect small fixes found late in design or during manufacturing by partially modifying the existing layout, without redoing the whole design?
  4. Which set correctly names cells with no logic function (or auxiliary ones) placed among standard cells to fill gaps, tie well potentials and suppress supply noise?
  5. What is the task called of circuit-simulating standard cell delay and power across various input transition times, load capacitances, voltages and temperatures and compiling the results into tables?