LSI design flow and EDA

Which low-power design technique stops the clock to unused circuit blocks to reduce wasted power?

  1. AOverclocking
  2. BClock gating
  3. CScan design
Show answer and explanation

Answer: B. Clock gating

Clock gating stops the clock to blocks that do not need to operate, eliminating needless switching of flip-flops and clock wiring and reducing dynamic power. Combined with power gating, which cuts off the supply itself, leakage current can also be reduced.

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