LSI design flow and EDA

In verifying large SoCs, which technique runs the designed circuit on dedicated hardware or FPGAs and verifies it quickly together with software?

  1. AEmulation and FPGA prototyping
  2. BDRC
  3. CCMP
Show answer and explanation

Answer: A. Emulation and FPGA prototyping

Software logic simulation becomes very slow for large circuits. Implementing and running the circuit on an emulator or FPGA allows verification orders of magnitude faster, and software development and verification can proceed before the chip exists, while running a real OS and applications.

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More LSI design flow and EDA questions

  1. What is it called to hand over the data for mask making to manufacturing after design and verification are complete?
  2. In the final check before tape-out (sign-off), which power-network analysis is performed alongside timing verification?
  3. Which design philosophy refines layouts and the like to make them less susceptible to manufacturing variation and defects?
  4. In analog layout, which technique splits paired transistors and places them so their centroids coincide?
  5. What is the main purpose of placing dummy patterns that do not function as circuits in empty areas of the layout?