I/O Interfaces & Buses

What is closest to the effective one-direction bandwidth of a PCI Express 3.0 x16 link (8 GT/s per lane, 128b/130b encoding)?

  1. AAbout 128 GB/s
  2. BAbout 1 GB/s
  3. CAbout 16 GB/s
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Answer: C. About 16 GB/s

The effective rate of one lane is 8 Gb/s × 128/130 ≈ 7.88 Gb/s, or about 0.985 GB/s after dividing by 8. Sixteen lanes give about 15.8 GB/s, roughly 16 GB/s in one direction, or about 32 GB/s for both directions together. PCI Express bandwidth is the product of the generation's per-lane rate, the coding efficiency and the lane count. Packet headers and other overhead make the real figure somewhat lower.

  • A. The bits were not converted to bytes.
  • B. That is the bandwidth of a single lane.
  • C. Correct. About 0.985 GB/s per lane times 16.
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More I/O Interfaces & Buses questions

  1. For PCI Express generations 3 through 6, how does the per-lane signaling rate change with each generation?
  2. What is a characteristic of PAM4 (four-level pulse amplitude modulation), adopted in PCI Express 6.0?
  3. Why does forward error correction (FEC) become more important with PAM4 than with NRZ?
  4. What happens when an x4 PCI Express SSD is plugged into a full-length x16 slot on a motherboard (assuming the slot is wired for at least x4)?
  5. Which statement about the structure of PCI Express is correct?