LSI design flow and EDA

Which is the correct order of a typical digital LSI design flow?

  1. ASpecification → RTL design → logic synthesis → place and route
  2. BLogic synthesis → specification → place and route → RTL design
  3. CPlace and route → RTL design → logic synthesis → specification
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Answer: A. Specification → RTL design → logic synthesis → place and route

First, the specification defines functions and performance, and RTL design is done in a hardware description language such as Verilog or VHDL. Logic synthesis then converts it into a gate-level netlist, and place and route creates the layout on the chip. Verification is done at each stage, and the result is finally output as mask data.

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More LSI design flow and EDA questions

  1. Which correctly describes logic synthesis?
  2. Which correctly describes static timing analysis (STA)?
  3. Which hardware description languages are mainly used in RTL design?
  4. Which correctly describes DRC (design rule check) in layout verification?
  5. Which technique confirms mathematically, without simulation, that a circuit's logic has not changed before and after logic synthesis?