Advanced packaging (3D and chiplets)

What is the problem called in which the speed of supplying data from memory cannot keep up with improvements in processor compute performance, limiting overall performance?

  1. AThe thermal wall
  2. BThe memory wall
  3. CMoore's law
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Answer: B. The memory wall

Processor compute performance has improved rapidly, but data transfer speed (bandwidth) to and from memory has grown more slowly, so compute units spend more time waiting for data. This is called the memory wall. It is especially severe in AI, which handles huge amounts of data, and advanced packaging that places HBM close to the processor is one countermeasure.

  • A. Limits from heat are a different problem, called the power wall and the like.
  • B. Correct. It is the problem of memory bandwidth limiting performance.
  • C. Moore's law is an empirical rule about the growth in transistor count.
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More Advanced packaging (3D and chiplets) questions

  1. Which stacking method, long used in smartphone memory and elsewhere, stacks multiple chips slightly offset from one another and connects each to the substrate with wire bonding?
  2. In contrast to chiplets, what is the conventional approach called in which all the functions a system needs are built into one large chip?
  3. Advanced packaging steps that use front-end-like fine processing at the wafer level, such as forming TSVs and fine redistribution layers, sit between the front end and back end. What are they called?
  4. Which TSMC 2.5D packaging technology is widely used to place AI GPUs and HBM side by side on a silicon interposer and connect them?
  5. Which TSMC fan-out wafer-level packaging technology became widely known when it was adopted for a smartphone processor in 2016?