I/O Interfaces & Buses

In PCI Express, sending many packets that each write 64 bytes yields effective bandwidth well below the theoretical figure. What is the main reason?

  1. A64-byte payloads cannot be sent over PCI Express
  2. BEach packet carries headers, error-detection codes and other overhead, which are large relative to the data
  3. CSmall packets are always corrupted and resent every time
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Answer: B. Each packet carries headers, error-detection codes and other overhead, which are large relative to the data

Besides data, a PCI Express packet carries a header with address and type, a data-link sequence number and CRC, physical-layer framing and so on, about 20 to 30 bytes in total. With 64 bytes of data, roughly 30% of the bits sent are not data. Transfers of 256 bytes or more shrink this share. This is another reason to watch packet size, not just raw bandwidth.

  • A. 64 bytes can be sent without problems.
  • B. Correct. Larger packets are more efficient.
  • C. Small packets are not more error-prone.
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More I/O Interfaces & Buses questions

  1. Which statement is correct about DMA using a ring of descriptors in memory, as widely used by network cards and NVMe SSDs?
  2. Which statement is correct about PCI Express link power saving (the L0s and L1 states of ASPM)?
  3. Why have high-speed connections between chips and boards moved from parallel transmission over many wires to serial transmission over a few fast wires?
  4. What is the role of a SerDes (serializer/deserializer) in high-speed serial links?
  5. Why do high-speed serial links use differential signaling, sending opposite signals on two wires?