I/O Interfaces & Buses

What is the role of a SerDes (serializer/deserializer) in high-speed serial links?

  1. AIt encrypts data to prevent eavesdropping
  2. BIt converts parallel on-chip data into one fast bit stream on the transmit side and restores the parallel data on the receive side
  3. CIt converts supply voltages to suit other circuits
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Answer: B. It converts parallel on-chip data into one fast bit stream on the transmit side and restores the parallel data on the receive side

Inside a chip, data moves slowly over buses dozens of bits wide. The SerDes transmitter reorders it into a single very fast bit stream, and the receiver recovers a clock from the stream, decides each bit and restores data of the original width. The physical layers of many high-speed interfaces, such as PCI Express, USB, Ethernet and storage links, are built from SerDes.

  • A. It is not an encryption circuit.
  • B. Correct. It is the core circuit of serial transmit and receive.
  • C. It is unrelated to power conversion.
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More I/O Interfaces & Buses questions

  1. Why do high-speed serial links use differential signaling, sending opposite signals on two wires?
  2. What is the role of the clock and data recovery (CDR) circuit in a high-speed serial receiver?
  3. What has been the purpose of 8b/10b encoding (sending 8 data bits as a 10-bit code) in serial links?
  4. On a link using 8b/10b encoding with a signaling rate of 5 Gb/s, what is the effective data rate?
  5. Which is closest to the efficiency of the 128b/130b encoding adopted from PCI Express 3.0 onward?