I/O Interfaces & Buses

Why have large SoCs adopted a network-on-chip (NoC) instead of a single shared bus?

  1. AA NoC enables wireless communication inside the chip
  2. BA shared bus carries only one transfer at a time, so it congests as blocks multiply and its wires grow long
  3. CThe CPU cannot read memory over a shared bus
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Answer: B. A shared bus carries only one transfer at a time, so it congests as blocks multiply and its wires grow long

A shared bus is enough with few blocks, but with dozens of CPU cores, GPUs and accelerators attached, a bus that carries one transfer at a time becomes congested. A NoC arranges routers and links in a mesh and sends data as packets along chosen routes, so many transfers between distant blocks travel simultaneously. Splitting wires into short segments also makes high clock frequencies easier.

  • A. A NoC is also wired.
  • B. Correct. A NoC carries many transfers in parallel.
  • C. Memory can be read over a shared bus.
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More I/O Interfaces & Buses questions

  1. Which describes CXL (Compute Express Link)?
  2. What is an advantage of memory expansion using CXL (CXL memory)?
  3. Which correctly lists the three protocols that make up CXL?
  4. What is the role of equalizers (such as CTLE and DFE) in high-speed serial receivers?
  5. Which statement about the eye diagram used to assess high-speed serial signal quality is correct?