I/O Interfaces & Buses

In AXI, what is the advantage of issuing the next read request without waiting for the previous one's response (having multiple outstanding requests)?

  1. ARequests keep flowing during memory latency, hiding it and raising bandwidth
  2. BFewer requests make the circuit smaller
  3. CResponses always come back in reverse order
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Answer: A. Requests keep flowing during memory latency, hiding it and raising bandwidth

If each request waits for its response before the next is issued, with 100 cycles of memory latency the bus sits idle most of the time. AXI tags requests with IDs and allows several to be outstanding, so data keeps returning during the latency and bandwidth is used well. Requests with different IDs may complete out of order, so whichever finishes first can be returned first.

  • A. Correct. IDs are used to tell them apart.
  • B. The number of requests does not decrease.
  • C. Ordering follows per-ID rules, not always reversed.
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More I/O Interfaces & Buses questions

  1. What is AXI4-Lite mainly used for?
  2. What is a characteristic of AXI4-Stream?
  3. Why have large SoCs adopted a network-on-chip (NoC) instead of a single shared bus?
  4. Which describes CXL (Compute Express Link)?
  5. What is an advantage of memory expansion using CXL (CXL memory)?